Use XML to build ASIC or SoC design specifications
Karen H. Wang, SiBEAM, Inc.
EETimes (7/31/2010 7:51 PM EDT)
In a semiconductor company, the ASIC engineers design the hardware, and the hardware specification is distributed to other teams for hardware validation, embedded software development, and data-sheet documentation. Unfortunately, no standardized tools to document and distribute the specification exist. ASIC engineers often use common tools, such as Microsoft's Word or Excel, or even a plain text editor; these "tools" have many shortcomings when used to create a hardware specification.
First, these tools cannot easily convey the structure of a hardware specification. The hardware design of a chip typically has a tree-like hierarchy--the chip has several logical blocks, each block contains many registers, and each register has multiple bitfields, as shown in Figure 1.
To read the full article, click here
Related Semiconductor IP
- Flexible Pixel Processor Video IP
- Bluetooth Low Energy 6.0 Digital IP
- MIPI SWI3S Manager Core IP
- Ultra-low power high dynamic range image sensor
- Neural Video Processor IP
Related White Papers
- Usage of Multibit Flip-Flop and its Challenges in ASIC Physical Design
- A Heuristic Approach to Fix Design Rule Check (DRC) Violations in ASIC Designs @7nm FinFET Technology
- Analog and Power Management Trends in ASIC and SoC Designs
- VLSI Physical Design Methodology for ASIC Development with a Flavor of IP Hardening
Latest White Papers
- Enabling Space-Grade AI/ML with RISC-V: A Fully European Stack for Autonomous Missions
- CANDoSA: A Hardware Performance Counter-Based Intrusion Detection System for DoS Attacks on Automotive CAN bus
- How Next-Gen Chips Are Unlocking RISC-V’s Customization Advantage
- Efficient Hardware-Assisted Heap Memory Safety for Embedded RISC-V Systems
- Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions