Lowering Barriers to Entry for ASICs
By TIRIAS Research
There has never been a better time to build your own custom application specific integrated circuit (ASIC). Despite the talk of Moore’s Law slowing and the cost of new chips rising, there are many opportunities to turn your sensor-driver design or your multi-chip controller into a small ASIC to lower costs and protect your intellectual property (IP).
This paper will explore the different ways in which companies are building chips that reduce cost, space, power, while adding features, and protecting the designer’s IP.
Related Semiconductor IP
- Post-Quantum Digital Signature IP Core
- Compact Embedded RISC-V Processor
- Power-OK Monitor
- RISC-V-Based, Open Source AI Accelerator for the Edge
- Securyzr™ neo Core Platform
Related White Papers
- Last-Time Buy Notifications For Your ASICs? How To Make the Most of It
- Partitioning to optimize AI inference for multi-core platforms
- ASICs Bring Back Control to Supply Chains
- From a Lossless (~1.5:1) Compression Algorithm for Llama2 7B Weights to Variable Precision, Variable Range, Compressed Numeric Data Types for CNNs and LLMs
Latest White Papers
- DRsam: Detection of Fault-Based Microarchitectural Side-Channel Attacks in RISC-V Using Statistical Preprocessing and Association Rule Mining
- ShuffleV: A Microarchitectural Defense Strategy against Electromagnetic Side-Channel Attacks in Microprocessors
- Practical Considerations of LDPC Decoder Design in Communications Systems
- A Direct Memory Access Controller (DMAC) for Irregular Data Transfers on RISC-V Linux Systems
- A logically correct SoC design isn’t an optimized design