Memory system tradeoffs: embedded DRAM in SoCs, Chip-on-Board, multichip packages or memory modules
Embedded.com (03/24/09, 01:10:00 AM EDT)
For design engineers developing the next generation motherboards, DRAM memory is becoming a major concern as end-users demand more memory. Software operating systems are getting larger and the applications are demanding more RAM than ever before.
New technologies, such as server virtualization, multi-core processor chips and dense blade servers have all increased the demand for memory. The more processing power you put on a CPU chip, the more you need to support it with memory. System designers are struggling to fit more and more memory onto smaller motherboards.
In making up your mind, it is necessary to consider in the context of your design the answers to the following questions:
-
System Memory Sizing: What is the quantity of memory required for all the software applications or data manipulation required from the computer system?
-
Memory Space and Memory Form-Factor Considerations: How much physical space in the computer (SoC, main-board etc..) will be allocated for the memory?
-
ystem Memory Bandwidth: How fast are the processor instructions and data being executed or processed to support the intensity of the computing task?
To read the full article, click here
Related Semiconductor IP
- RVA23, Multi-cluster, Hypervisor and Android
- 64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
- NPU IP Core for Mobile
- V-by-One® HS plus Tx/Rx IP
- MSP7-32 MACsec IP core for FPGA or ASIC
Related White Papers
- SOC isn't cutting it yet. Is multi-chip package a better answer today?
- SOC Stability in a Small Package
- Apply memory BIST to external DRAMs
- New Power Management IP Solution Can Dramatically Increase SoC Energy Efficiency
Latest White Papers
- Concealable physical unclonable functions using vertical NAND flash memory
- Ramping Up Open-Source RISC-V Cores: Assessing the Energy Efficiency of Superscalar, Out-of-Order Execution
- Transition Fixes in 3nm Multi-Voltage SoC Design
- CXL Topology-Aware and Expander-Driven Prefetching: Unlocking SSD Performance
- Breaking the Memory Bandwidth Boundary. GDDR7 IP Design Challenges & Solutions