Automotive System & Software Development Challenges - Part 2
Frank Schirrmeister, Cadence Design Systems
EDN (November 12, 2013)
Part 1 of this article discussed automotive design chains and their dynamics, as well as software and networking challenges in automotive. We closed with a discussion of the different development engines for chip and system design – virtual prototyping, RTL simulation, acceleration/emulation and FPGA based prototyping.
To read the full article, click here
Related Semiconductor IP
- 8MHz / 40MHz Pierce Oscillator - X-FAB XT018-0.18µm
- UCIe RX Interface
- Very Low Latency BCH Codec
- 5G-NTN Modem IP for Satellite User Terminals
- 400G UDP/IP Hardware Protocol Stack
Related Articles
- Automotive System & Software Development Challenges - Part 1
- Dealing with automotive software complexity with virtual prototyping - Part 1: Virtual HIL development basics
- Providing memory system and compiler support for MPSoc designs: Customization of memory architectures (Part 2)
- Using model-driven development to reduce system software security vulnerabilities
Latest Articles
- SNAP-V: A RISC-V SoC with Configurable Neuromorphic Acceleration for Small-Scale Spiking Neural Networks
- An FPGA Implementation of Displacement Vector Search for Intra Pattern Copy in JPEG XS
- A Persistent-State Dataflow Accelerator for Memory-Bound Linear Attention Decode on FPGA
- VMXDOTP: A RISC-V Vector ISA Extension for Efficient Microscaling (MX) Format Acceleration
- PDF: PUF-based DNN Fingerprinting for Knowledge Distillation Traceability