Selecting the right hardware configuration for the signal processing platform
Deepak Shankar
embedded.com (November 21, 2016)
The quality of signal processing systems such as a software defined radio or a communication modem is dependent on the performance of the selected hardware platform. Early design explorations enable the designer to gain insights into implementation challenges, architectural decisions to enhance performance and power, and hardware/software partitioning before Register-Transfer level (RTL) and software are available.
In addition, early design explorations assist architectural design decisions that facilitate planning for current and future requirements. Designers can further extend the design explorations to conduct fault analysis and identify test cases for verification.
This article presents the system level modelling and simulation methodology to architect a signal processing platform for software-defined radios or high-speed communication modems early in the design flow.
To read the full article, click here
Related Semiconductor IP
- 1.8V/3.3V I/O library with ODIO and 5V HPD in TSMC 16nm
- 1.8V/3.3V I/O Library with ODIO and 5V HPD in TSMC 12nm
- 1.8V to 5V GPIO, 1.8V to 5V Analog in TSMC 180nm BCD
- 1.8V/3.3V GPIO Library with HDMI, Aanlog & LVDS Cells in TSMC 22nm
- Specialed 20V Analog I/O in TSMC 55nm
Related White Papers
- Infinite-ISP: An Open Source Hardware Image Signal Processor Platform for all Imaging Needs
- Reconfiguring Design -> Reconfigurable computing aims at signal processing
- Reconfigurable signal processing key in base station design
- Programmable network processing blade needed in switching platform