Picking the right MPSoC-based video architecture: Part 1
By Santanu Dutta, Jens Rennert, Tiehan Lv, Jiang Xu, Shengqi Yang, and Wayne Wolf
Embedded.com (08/17/09, 05:45:00 PM EDT)
The growing demand in multimedia video processing and its applications owes its origin to and, at the same time, is responsible for the further development of both hardware design and software techniques.
Aided by advancements in very large-scale integrated circuit (VLSI) manufacturing technology that has made possible the integration of increased functionality in smaller circuits, it is primarily the development of novel signal-processing architectures and design techniques that has brought audio, video, graphics, image, speech, and text processing together.
It has also prompted advanced multimedia video applications such as high-definition digital television, digital set-top boxes with time-shift functionality, 3D games, H.26x video conferencing, MPEG-4 interactivity, and so forth.
The computational requirements of multimedia video processing being dominated by signal-processing tasks that require complex and real-time processing on high volumes of data, this chapter attempts to take a closer look at some of the recent trends in designing integrated circuits (ICs) for such systems.
To read the full article, click here
Related Semiconductor IP
- Root of Trust (RoT)
- Fixed Point Doppler Channel IP core
- Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
- Polyphase Video Scaler
- Compact, low-power, 8bit ADC on GF 22nm FDX
Related White Papers
- Picking the right MPSoC-based video architecture: Part 2
- Picking the right MPSoC-based video architecture: Part 3
- Picking the right MPSoC-based video architecture: Part 4
- Processor Architecture for High Performance Video Decode
Latest White Papers
- Reimagining AI Infrastructure: The Power of Converged Back-end Networks
- 40G UCIe IP Advantages for AI Applications
- Recent progress in spin-orbit torque magnetic random-access memory
- What is JESD204C? A quick glance at the standard
- Open-Source Design of Heterogeneous SoCs for AI Acceleration: the PULP Platform Experience