Modules provide alternative to RF SoCs
Modules provide alternative to RF SoCs
By Mark Rencher and Ted Miracco, EEdesign
May 7, 2003 (6:12 a.m. EST)
URL: http://www.eetimes.com/story/OEG20030505S0077
Module technology, including system-in-a-package (SiP) and multi-chip modules (MCMs), is creating attractive alternatives to the system-on-a-chip (SoC) design methodology for systems that require radio frequency (RF) and analog functionality. Low-temperature co-fired ceramic (LTCC) and other packaging methods are advantageous because they can integrate multiple best-in-class technology components, including integrated circuits (ICs) and surface mount devices (SMDs), while enabling embedded passives and interconnect circuitry to be sandwiched between the substrate layers. The module platform is a viable SoC alternative in terms of time-to-market, cost, product size, and performance. When compared to complementary metal oxide semiconductor (CMOS) ICs, the economics of the module platform can provide significant financial improvements. Unlike earlier module technology, LTCC has matured to a point that seven out of 10 Bluetooth solutions now use the LT CC module platform. Additionally, cell phone handsets, automotive and consumer electronics, and medical products are currently manufactured using module technology because of its many inherent advantages. The cell phone baseband module in Figure 1 is an excellent example of a wireless handset application. Despite the many advantages, continued growth of the module platform market will require significant improvements and committed support from electronic design automation (EDA) companies.
Figure 1 -- Cellphone baseband module
Advantages of module platforms include:
- Miniaturization Moving chipsets from a printed circuit board (PCB) to a module platform can reduce size by as much as 50%. See Figure 2 for a PCB to MCM example.
- Passive elements, including high-Q inductors, resistors, and capacitors, can be easily integrated.
- Multiple routing layers provide control of the die and S MD placement.
- Mixed IC technologies, including gallium arsenide (GaAs), silicon germanium (SiGe), and CMOS can all be incorporated into a module without complicated shielding techniques that are required for SoCs.
- Component reuse and upgrades are easily facilitated with the module platform. For example, a single IC can be upgraded in a module without requiring a multi-million dollar mask revision.
- Utilization of state-of-the-art digital IC technology, such as 90 nanometer CMOS, is possible without waiting two to three years for RF and analog versions of the process to become available.
Figure 2 -- MCM miniaturization
A primary roadblock to module platform design is the integration and interoperability of simulation and layout tools. Last year's RFIC conference in Seattle, and a subsequent EE Times article, outlined the need for EDA companies to actively support a module platform design flow. Module design houses and manufacturing companies are experiencing the pain of inadequate EDA tools and, without resolution, this will stifle the growth and development of this technology. Module design requires an integrated and interactive design environment that can handle the physical layout of ICs and PCBs to ensure productive and efficient use of design resources. A key requirement for the module platform design technology is the ability to interactively design components in multiple descriptions simultaneously, and to understand upfront the impact of interconnect. Because RF and high-frequency design requires a tightly coupled interaction between physical descriptions and electrical models, the ideal design suite is built upon an object-orie nted database that enables design elements to be described, visualized, simulated, and analyzed using electrical, physical, and logical views. For example, Applied Wave Research's Microwave Office software provides a single design environment where the RF engineer can create, modify, simulate, and analyze a spiral inductor using a physical layout and an electrical model based on electromagnetic simulation. AWR has also created process design kits (PDKs) for leading LTCC foundries. These PDKs have been validated on designs such as the complete receiver in Figure 4. Embedded passives (R, C, L) have been created that enable the designer to create continuous configurations of length, width, spacing, and turns (spiral inductor). This design includes multiple ICs from various process technologies, discrete SMDs, and embedded passives. The module platform provides a compel ling alternative to the current SoC trend of single IC integration and is verified by the successful design and layout of complex RF MCMs. Mark Rencher is president of Applied Wave Research.
Figure 3 -- MCM spiral inductor
Figure 4 -- Receiver MCM design
Related Semiconductor IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
- High Speed Ethernet 2/4/8-Lane 200G/400G PCS
Related White Papers
- Digital alternative posed to conventional RF
- ZigBee SoCs provide cost-effective solutions
- Memory system tradeoffs: embedded DRAM in SoCs, Chip-on-Board, multichip packages or memory modules
- An alternative to ADC, power and RF IC hardware: the S3 Group
Latest White Papers
- New Realities Demand a New Approach to System Verification and Validation
- How silicon and circuit optimizations help FPGAs offer lower size, power and cost in video bridging applications
- Sustainable Hardware Specialization
- PCIe IP With Enhanced Security For The Automotive Market
- Top 5 Reasons why CPU is the Best Processor for AI Inference