Multimode sensor processing using Massively Parallel Processor Arrays (MPPAs)
March 18, 2008 -- pldesignline.com
Multi-mode sensor processing – such as that for radar beamforming and for electro- optical (E-O) or infrared (IR) image processing – presents formidable computing problems. It requires extremely high data throughput and processing power, which requirements change dynamically with operating conditions.
Multi-mode sensor processing has traditionally been implemented using DSPs or FPGAs, but their lack of run-time programmability and re-configurability forces the worst-case design for each type of device. This creates a tremendous need for a solution that is upwardly scalable, reconfigurable, and programmable, all while reducing development costs and time to market.
The Massively Parallel Processor Array (MPPA) solution
Ambric (www.ambric.com) has developed a new computing architecture and device – a Massively Parallel Processor Array (MPPA) – that can be reconfigured in real time to adapt on-demand to the dynamic computational and functional requirements of multi-mode sensor platforms.
Performance of up to one TeraOPS
The ultra-high-performance Ambric Am2045 MPPA features 336 32-bit RISC processors delivering up to one teraOPS processing speed. It also features programmable 32-bit communication fabric for high-performance inter-processor connections. The Am2045 also includes a four-lane PCI Express interface and four GPIO ports, with an aggregate I/O bandwidth of 29 Gbps per second.
Scalability with no need to change design methodology
The Ambric Am2045 MPAA may be scaled to application requirements simply by reallocating computing resources (processors and/or memories) available within the chip or across multiple chips. The Ambric Structural Object Programming Model enables applications to add or reconfigure resources with no major design overhaul. This keeps development on schedule.
To read the full article, click here
Related Semiconductor IP
- Root of Trust (RoT)
- Fixed Point Doppler Channel IP core
- Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
- Polyphase Video Scaler
- Compact, low-power, 8bit ADC on GF 22nm FDX
Related White Papers
- Massively parallel frameworks for in-design verification
- When Your Embedded Processor Runs Out of Steam, Try Parallelism
- SoC Test and Verification -> Assertions speed processor core verification
- High-Performance DSPs -> Processor boards: Architecture drives performance
Latest White Papers
- Monolithic 3D FPGAs Utilizing Back-End-of-Line Configuration Memories
- Reimagining AI Infrastructure: The Power of Converged Back-end Networks
- 40G UCIe IP Advantages for AI Applications
- Recent progress in spin-orbit torque magnetic random-access memory
- What is JESD204C? A quick glance at the standard