Market Focus: Chip Design Alternatives
By Ann Steffora Mutschler -- 3/15/2004
Electronic News
Electronic News
With the number of available transistors to reach 1.8 billion by 2010 in-line with Moore’s law, it will simply not be possible to uniquely design each one.
As a result, the use of reusable IP will increase to occupy as much as 90 percent of a 65nm chip, according to Intel. Internal IP development has already given way to a merchant IP market as companies struggle to find markets for high-volume applications and amortize sky-high design and manufacturing costs.
Read more ....
Related Semiconductor IP
- PUF FPGA-Xilinx Premium with key wrap
- ASIL-B Ready PUF Hardware Premium with key wrap and certification support
- ASIL-B Ready PUF Hardware Base
- PUF Software Premium with key wrap and certification support
- PUF Hardware Premium with key wrap and certification support
Related White Papers
- Market Focus: DSP makers' forward spin on the market
- Market Focus: Analog/mixed-signal
- IP market to drive chip recovery, says report
- Reducing Time To Market for System On Chip Using IP Development and Integration Flow
Latest White Papers
- e-GPU: An Open-Source and Configurable RISC-V Graphic Processing Unit for TinyAI Applications
- How to design secure SoCs, Part II: Key Management
- Seven Key Advantages of Implementing eFPGA with Soft IP vs. Hard IP
- Hardware vs. Software Implementation of Warp-Level Features in Vortex RISC-V GPU
- Data Movement Is the Energy Bottleneck of Today’s SoCs