How to manage dynamic power in a microcontroller using its non-maskable interrupt
How to manage dynamic power in a microcontroller using its non-maskable interrupt To read the full article, click here
By Ajit Basarur, Shantanu Prasad Prabhudesai, and Nazmul Hoda, Ittiam Systems
pldesignline.com (August 06, 2008)
Abstract
As portable systems become increasingly power-conscious, the need for smart power management becomes equally important. Besides the main processor, an auxiliary Microcontroller Unit (MCU) often resides on such systems to take care of house keeping activities such as various user interfaces and a real-time clock (RTC), which has to tick even when the system is powered off.
In this article, we suggest a mechanism to implement power management scheme for the MCU based on system switch on and off states by using its non-maskable interrupt (NMI) pin.
1. Typical embedded system overview.
(Click this image to view a larger, more detailed version)
Related Semiconductor IP
- Power-OK Monitor
- RISC-V-Based, Open Source AI Accelerator for the Edge
- Securyzr™ neo Core Platform
- 112G Multi-SerDes
- SHA3 Cryptographic Hash Cores
Related White Papers
- A need for static and dynamic Low Power Verification
- FinFET impact on dynamic power
- Dynamically controlled logic gate design for all power modes
- Making interrupt design firmware friendly
Latest White Papers
- Practical Considerations of LDPC Decoder Design in Communications Systems
- A Direct Memory Access Controller (DMAC) for Irregular Data Transfers on RISC-V Linux Systems
- A logically correct SoC design isn’t an optimized design
- AI in VLSI Physical Design: Opportunities and Challenges
- cMPI: Using CXL Memory Sharing for MPI One-Sided and Two-Sided Inter-Node Communications