How to manage dynamic power in a microcontroller using its non-maskable interrupt
How to manage dynamic power in a microcontroller using its non-maskable interrupt To read the full article, click here
By Ajit Basarur, Shantanu Prasad Prabhudesai, and Nazmul Hoda, Ittiam Systems
pldesignline.com (August 06, 2008)
Abstract
As portable systems become increasingly power-conscious, the need for smart power management becomes equally important. Besides the main processor, an auxiliary Microcontroller Unit (MCU) often resides on such systems to take care of house keeping activities such as various user interfaces and a real-time clock (RTC), which has to tick even when the system is powered off.
In this article, we suggest a mechanism to implement power management scheme for the MCU based on system switch on and off states by using its non-maskable interrupt (NMI) pin.
1. Typical embedded system overview.
(Click this image to view a larger, more detailed version)
Related Semiconductor IP
- Root of Trust (RoT)
- Fixed Point Doppler Channel IP core
- Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
- Polyphase Video Scaler
- Compact, low-power, 8bit ADC on GF 22nm FDX
Related White Papers
- A need for static and dynamic Low Power Verification
- FinFET impact on dynamic power
- Dynamically controlled logic gate design for all power modes
- Making interrupt design firmware friendly
Latest White Papers
- Reimagining AI Infrastructure: The Power of Converged Back-end Networks
- 40G UCIe IP Advantages for AI Applications
- Recent progress in spin-orbit torque magnetic random-access memory
- What is JESD204C? A quick glance at the standard
- Open-Source Design of Heterogeneous SoCs for AI Acceleration: the PULP Platform Experience