Using cryptography to secure embedded device authentication profiles: Part 1
By Kerry Maletsky, Atmel
Embedded.com (04/17/09, 10:58:00 PM EDT)
Development of products using the latest technology costs a lot of money. The greater the development cost, the greater the temptation to clone the product. Counterfeit goods comprise between 1% and 5% of worldwide trade, and it is growing at an alarming rate.
Since the cloner doesn't have a reputation to protect, quality and performance often suffer. The cloner can make a greater profit and offer the product at a lower cost by bypassing the development process and cutting corners on product safety and reliability. The result can be annoying if an ink cartridge fails. It can be expensive if a counterfeit battery damages the end-product. It can be life-threatening if a medical consumable is below standard..
Another issue is microprocessor firmware. Hackers are constantly figuring out ways to defeat product features intended to product the end-user from unauthorized firmware downloads.
While opening up a mobile phone to additional service providers may seem attractive, it puts the phone at risk of getting malware that could compromise the end-users personal information or damage the phone itself.
The harm done to the end-user by counterfeit products or software can damage the reputation of the OEM, increasing product liability, maintenance and warranty costs, and decreased sales in the future..
To read the full article, click here
Related Semiconductor IP
- Root of Trust (RoT)
- Fixed Point Doppler Channel IP core
- Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
- Polyphase Video Scaler
- Compact, low-power, 8bit ADC on GF 22nm FDX
Related White Papers
- FPGAs lower costs for RSA cryptography
- ECC Holds Key to Next-Gen Cryptography
- Securing ad hoc embedded wireless networks with public-key cryptography
- Using cryptography to secure embedded device authentication profiles: Part 2
Latest White Papers
- Reimagining AI Infrastructure: The Power of Converged Back-end Networks
- 40G UCIe IP Advantages for AI Applications
- Recent progress in spin-orbit torque magnetic random-access memory
- What is JESD204C? A quick glance at the standard
- Open-Source Design of Heterogeneous SoCs for AI Acceleration: the PULP Platform Experience