Sub-Threshold Design - A Revolutionary Approach to Eliminating Power By Mike Salas, Ambiq Micro December 29, 2014
SoC clock monitoring issues: Scenarios and root cause analysis By Geetika Arora, Freescale Semiconductor December 19, 2014
ESIstream vs. JESD204B for Ultra-High-Speed Chip-Chip Communications By Max Maxfield December 18, 2014
Rigorous Framework for Hardware-Software Co-design of Embedded Systems By Emmanuel Vaumorin, Magillem December 15, 2014
Driving the Future of Automotive Infotainment with Noise Resilient Audio Converters By Fabien Viemon, Dolphin Integration December 8, 2014
Techniques for CDC Verification of an SoC By Ankush Sethi, Freescale Semiconductor India December 8, 2014
Fast, Thorough Verification of Multiprocessor SoC Cache Coherency By Adnan Hamid, Breker Verification Systems December 4, 2014
A framework for the straightforward integration of a cryptography coprocessor in SoC-based applications By Gregory Baudet, Barco Silex December 1, 2014
Effective Optimization of Power Management Architectures through Four standard "Interfaces for the Distribution of Power" By Hugo KUO, Dolphin Integration November 24, 2014
Safeguard your FPGA system with a secure authenticator By Michael D'Onofrio, Maxim Integrated November 24, 2014
Creating core independent stimulus in a multi-core SoC verification environment By Ankit Khandelwal, Freescale Semiconductors November 24, 2014
Real-Time Trace: A Better Way to Debug Embedded Applications By James Campbell, Synopsys Inc. November 24, 2014