USB 3.1 Gen 2 Brings Higher Data Rates with Architecture Improvements By Jacek Duda, Cadence September 28, 2015
Reducing IC power consumption: Low-power design techniques By Sunil Deep maheshwari, Freescale Semiconductor September 25, 2015
Implementing Ultra Low Latency Data Center Services with Programmable Logic By John W. Lockwood, Algo-Logic Systems September 21, 2015
Timing Aware Redundant Buffer Removal By Kushagra Khorwal, Freescale Semiconductors India September 14, 2015
How to power FPGAs with Digital Power Modules By Felix Martinez, Intersil Corporation September 14, 2015
An Automated Flow for Reset Connectivity Checks in Complex SoCs having Multiple Power Domains By Manthankumar Tejani, Freescale Semiconductor September 7, 2015
Method for Booting ARM Based Multi-Core SoCs By Amitav Halder, Freescale Semiconductor August 31, 2015
USB Power Delivery 2.0 Enables Power Distribution Flexibility By Paul Pickering, Consultant August 31, 2015