Efficient SIMD and Algorithmic Optimization Techniques for H264 Decoder on Cortex A9 By Vinith Kumar N, PathPartner July 18, 2016
Clock Path Pessimism: Statistical vs. Logical By Syed Shakir Iqbal, LG Soft India Pvt. Ltd. July 11, 2016
Setting up secure VPN connections with cryptography offloaded to your Altera SoC FPGA By Roger May, Altera July 11, 2016
FPGAs solve challenges at the core of IoT implementation By Helmut Demel, Lattice Semiconductor July 5, 2016
Platform Software Verification Approaches For Safety Critical Systems By Nirav S Patel, eInfochips July 4, 2016
Synchronizing sample clocks of a data converter array By Kazim Peker , Analog Devices, Inc. July 1, 2016
Safety Integrity Level - an Overview for FPGA Engineers By Sharanbasappa Raghapur, HCL Technologies June 30, 2016
Fronthaul Evolution Toward 5G: Standards and Proof of Concepts By Thomas G. Noergaard, Comcores June 13, 2016
Thorough validation: the conundrum of Pulsed latch libraries turned practical as Spinner systems By Mathieu Louvat , Dolphin Integration June 13, 2016
Lossless Medical Video Compression Using HEVC By Palachandra M V, PathPartner Technology June 6, 2016
Methodology to lower supply voltage of standard cell libraries By Bastien Arricca, Dolphin Integration May 31, 2016
Custom Corner Characterization for Optimal ASIC/SoC Designs By Naveen Narang, Open-Silicon May 26, 2016
Security Considerations For Bluetooth Smart Devices By Ravikiran HV, PathPartner Technology Pvt.Ltd. May 9, 2016