Xyalis announce a new release of GTsmooth its density estimator and tiling engine
GRENOBLE, France - May 17, 2004 - XYALIS announced today that it has shipped GTsmooth V2.0, its next generation of model-based estimator and dummy tiles insertion tool.
Since 1995, a Chemical-Mechanical Polishing step has been adopted in the process to flatten wafer surface between each metal layer.
The approach of inserting "dummy" metal tiles in all empty areas is not satisfactory in some cases because it introduces to many parasitics.
Traditional methods have not been successful in solving this problem and It is necessary to use a model based algorithm to get the best results and to minimize the number of inserted tiles while achieving the highest yield.
GTsmooth, new graphical interface, provides now density maps of the chip, 3D representation of chip surface and 2D vertical cut curves for profile analysis with all measurements facilities. This new capability allows engineers to easily validate the chips or wafer database before processing and verify that target yields are achievable. This tool can be the foundation for a Go/No-Go test for CMP yields before chip processing.
This new tool has been validated and is in use at a number of foundries around the world. Several tier foundries are also evaluating this tool to measure the impact of dummies insertion with STI based processes.
A generic oxide CMP model can be provided as a foundation to accelerate a custom model development specifically adjusted to the target process. An STI model can be developed upon request.
Availability
GTsmooth is available today on 32-bit Linux, and 32-bit and 64-bit Solaris, HP-UX platforms. GTsmooth price starts at $30.000 per year.
About Xyalis
XYALIS is a privately held company, founded in 1998, and located in Grenoble, France. XYALIS is the leading specialist in layout finishing and GDSII processing software. (www.xyalis.com)
Since 1995, a Chemical-Mechanical Polishing step has been adopted in the process to flatten wafer surface between each metal layer.
The approach of inserting "dummy" metal tiles in all empty areas is not satisfactory in some cases because it introduces to many parasitics.
Traditional methods have not been successful in solving this problem and It is necessary to use a model based algorithm to get the best results and to minimize the number of inserted tiles while achieving the highest yield.
GTsmooth, new graphical interface, provides now density maps of the chip, 3D representation of chip surface and 2D vertical cut curves for profile analysis with all measurements facilities. This new capability allows engineers to easily validate the chips or wafer database before processing and verify that target yields are achievable. This tool can be the foundation for a Go/No-Go test for CMP yields before chip processing.
This new tool has been validated and is in use at a number of foundries around the world. Several tier foundries are also evaluating this tool to measure the impact of dummies insertion with STI based processes.
A generic oxide CMP model can be provided as a foundation to accelerate a custom model development specifically adjusted to the target process. An STI model can be developed upon request.
Availability
GTsmooth is available today on 32-bit Linux, and 32-bit and 64-bit Solaris, HP-UX platforms. GTsmooth price starts at $30.000 per year.
About Xyalis
XYALIS is a privately held company, founded in 1998, and located in Grenoble, France. XYALIS is the leading specialist in layout finishing and GDSII processing software. (www.xyalis.com)
Related Semiconductor IP
- 50G PON LDPC Encoder/Decoder
- UALink Controller
- RISC-V Debug & Trace IP
- UALinkSec Security Module
- PUF-based Post-Quantum Cryptography (PQC) Solution
Related News
- XYALIS Announces GTsmooth, The First Hybrid Metal-Fill Tool
- Actel drives up density of flash-based FPGAs
- Atmel Introduces New Embedded Memory Blocks to Support High Density FPGA Conversions
- SuperH, Inc., Announces First SH-5 Core Now Available for Licensing; Digital Consumer and Automotive Applications Benefit from Low Power, High Code Density Processor
Latest News
- OpenTitan Introduces New Membership Tiers and Deliverables to Accelerate Deployment
- ZeroPoint Technologies Appoints Brett Cline as Chief Executive Officer
- Neurophos Secures $110 Million Series A to Launch Exaflop-Scale Photonic AI Chips
- Akeana tapes out highest performance RVA23 Alpine test chip
- Access Advance Closes 2025 with Record Quarter: Eight Major Licensees, 100% Renewal Rate, Litigations Resolved