Xilinx And Sandia National Labs Team To Drive Reconfigurable Logic Technology Into Space

New Triple Module Redundancy (TMR) software tool coupled with Xilinx's QPRO Virtex-II FPGAs mitigates single event upsets for harsh environment applications

MAPLD, WASHINGTON D.C., September 8, 2004 - Xilinx, Inc. (NASDAQ:XLNX) today announced the immediate availability of the industry's first stand alone Triple Module Redundancy (TMR) software tool for programmable devices, co-developed with Sandia National Labs. The TMR Tool, combined with Xilinx's QPRO Virtex -II radiation-tolerant platform FPGAs, mitigates the effects of single event upsets in harsh radiation environments enabling the benefits of reconfigurable technologies to be employed in very high reliability applications including deep space, avionics, satellite and communications. With the new tool, Xilinx firmly establishes its leadership position in enabling multi-million gate reconfigurable technologies as the solution of choice for high-reliability aerospace and defense applications.

"Recent space programs such as the Mars Rover, have heightened both the public and the space communities awareness of the extreme benefits of being able to reconfigure a system after it has been deployed. With the TMR Tool, Xilinx enables designers to realize the significant advantage of reconfigurable logic in a harsh environment by combining the benefits of reprogrammability, high density and high reliability into a single solution," said Mustafa Veziroglu, general manager of the Market-Specific Product Division at Xilinx. "As the leading FPGA supplier to the Aerospace and Defense markets, we expect the adoption of Xilinx solutions to continue as designers rapidly realize the benefits of deploying reconfigurable technology over fixed logic technology for harsh radiation environments."

"Sandia National Laboratories has utilized the Xilinx Virtex-II FPGA series to achieve new levels of performance in the complex high data rate on-board data processing systems for a new advanced technology satellite payload," said Kurt Lanes, senior engineer for the Monitoring Systems and Technology Center at Sandia National Laboratories. "This system demands the highest level of reliability, availability, processing performance and throughput. The cooperation between Sandia and Xilinx in developing the TMR Tool has yielded excellent results. It has provided significant productivity enhancements and implements effective SEU immunity for space radiation environments. We envision using Xilinx FPGAs and the TMR Tool for Sandia's future space programs."

"Today's announcement shatters the myth perpetuated by fixed-logic suppliers that SEU immune designs cannot be implemented with reprogrammable FPGAs. Fixed-logic suppliers are driven to perpetuate this myth given their inability to deliver the multi-million gate densities, performance and flexibility achieved with Xilinx FPGAs," said Rick Padovani, general manager of the Aerospace and Defense Division at Xilinx. "With efficient design tools to implement triple module redundancy, designers of space-based systems can take full advantage of Xilinx technology and reliability."

High Productivity and Proven Reliability
The XTMR tool dramatically improves productivity by automatically generating redundant and associated voting circuitry. Designers now only need to generate a design once while the parametrically selectable software tool replicates the design twice. Because this task was previous done manually, the time it takes for this task is greatly reduced and the potential for error eliminated.

Xilinx continues to expand both its product portfolio and investment in the Aerospace and Defense industry by driving industry consortia such as the Single Events Consortium (SEE). Formed in 2002, by Xilinx in cooperation with NASA Jet Propulsion Laboratory and experts from industry, government and academia, the SEE consortia focuses on the test and characterization of radiation effects for reconfigurable FPGAs. Through their efforts, the effectiveness of innovative radiation mitigation techniques such as Configuration Scrubbing and Triple Modular Redundancy have been evaluated and documented enabling the Aerospace and Defense market to derive the significant benefits of reconfigurable logic.

QPRO Virtex-II Family
With the QPRO Virtex-II family, designers can take advantage of a complete suite of design solutions including the broadest library available of proven connectivity IP, system solution boards, and development platforms. Well-established partnerships and certified interoperability with key industry standards yields a design ecosystem that is unparalleled in the industry. The QPRO Virtex-II family offers high-performance I/O signaling technology supporting up to 840 MBPS in both plastic and ceramic packages while offering up to 1104 user I/O. By combining such high-performance features as 144 independent blocks of 18Kbit embedded memory and superior DSP performance with a flexible fabric, the Virtex-II QPRO devices address many of today's industry challenges.

Online Design Resource
The Xilinx eSP web portal dedicated specifically to the design and development of defense and aerospace application, provides a comprehensive resource for system designers, delivering a powerful array of solutions and information in a single location. Visit www.xilinx.com/esp/milaero for more information.

Pricing and Availability
The TMR Tool v6.31 is immediately available and comes packaged with complete customer training. Complete information can be found at: www.xilinx.com/products/milaero/tmr/index.htm

Xilinx is the worldwide leader in complete programmable logic solutions. For more information, visit www.xilinx.com.