Virtual Silicon ships0.18-micron libraries

Virtual Silicon ships0.18-micron libraries
By Michael Santarini, EE Times
March 22, 1999 (10:35 a.m. EST)
URL: http://www.eetimes.com/story/OEG19990322S0007

Virtual Silicon Technology Inc. will announce at the IP99 Conference today that it is shipping its 0.18-micron-ASIC library solution Diplomat-18.

The libraries cover standard cells, I/O pads, memory compilers and what the company terms application-specific silicon-ready components-i.e., phase-locked loops (PLLs) and advanced I/O functions-for 0.18-micron processes from United Microelectronics Corp., Taiwan Semiconductor Manufacturing Co., NEC Corp. and IBM Microelectronics.

Virtual Silicon developed Diplomat-18 with the help of its foundry partners and system-on-silicon customers. The company said the library components have been silicon-proven on UMC's 0.18-micron process.

Virtual Silicon demonstrated first working silicon in 0.18-micron test chips in late 1998. The predicted performance of the libraries is said to have matched actual silicon results within an accuracy of 10 percent. The I/O pads demonstrated ESD protection in excess of 3,000 V (as dictated in MIL-STD-883). Latchup tests are said to have exceeded the Jedec-specified 300 mA at 100 degrees C.

Diplomat-18 libraries consist of high-performance, high-density standard cells, 3.3-V, TTL-compatible I/Os, synchronous single-port and two-port SRAM compilers, ROM compilers, application-specific I/Os and PLLs. The company claims the standard cells offer optimum performance and density for graphics-intensive computing, networking and consumer applications.

The 3.3-V I/O libraries support both 40-micron-pitch staggered bonding (for pad-limited designs) and 60-micron linear bonding (for core-limited designs).

Diplomat's memory compilers generate SRAMs and ROMs that allow systems designers flexibility in memory layout. The company says it wrote the compilers in Java to maximize platform independence and generate fully automated layouts and EDA models.

Diplomat-18's application-specific silicon-ready components are available for an additional fee. Virtual Silicon claims to characterize each of those library components using process-specific Spice models provided by targeted foundries.

Since the libraries support EDA tools from such vendors as Synopsys, Cadence, Mentor and Avant!, they can be used in multiple design flows. The libraries are available in both foundry-specific and multifoundry versions.

The company claims to have a backlog of several million dollars' worth of orders for the Diplomat-18. In June, NEC was revealed to be one of those customers. Other customers are said to include traditional integrated device manufacturers as well as fabless semiconductor companies in the graphics, consumer and networking markets.

Virtual Silicon supports a variety of licensing models, ranging from perpetual, royalty-free licenses to royalty-based models and other time-deferred financing plans.

Customer orders for Diplomat-18 libraries are being accepted now. Delivery starts this month.

The libraries will also be ma de available at no charge to members of Virtual Silicon's IP Ambassador Program, announced last year.

See www.virtual-silicon.com.