videantis to Showcase Ultra-Efficient AI Inference at CES 2026

videantis Demonstrates Its 4th-Generation Unified Processing Architecture at CES 2026 EUREKA PARK – Venetian Expo, Level 1, Hall G, Booth #60821

Hannover, Germany — January 5^th, 2026 — videantis, a leader in unified compute architectures for AI, embedded vision, and multimodal processing, will showcase ultra-efficient AI inference on a silicon implementation of its 4th-generation unified processing architecture at the 2026 Consumer Electronics Show (CES) in Las Vegas from January 6-9, 2026. The presentation will take place at the EIC pavilion at Eureka Park, the global stage for emerging technology.

Engineered for next-generation silicon designs, the new architecture delivers unmatched compute efficiency, achieving industry-leading performance-per-area and performance-per-watt (PPA) metrics. Its seamlessly scalable design allows all available processing resources to be flexibly allocated across NPU, ISP, DSP, GPU, and video codecs workloads. This enables customers to support today’s diverse application stacks—while remaining fully adaptable for future AI and other algorithmic evolution through software upgrades alone.

At CES 2026, videantis will demonstrate full-scale state-of-the-art AI models running with seamless scalability from single- to multi-core on a tiny 3×3 mm2 die at ultra-low power consumption in the low mW range, achieving best-in-class silicon utlization with its fully versatile, programmable AI DSP core architecture.

The architecture’s efficiency and versatility were recently validated in a high-volume design win for a Chinese feature-phone platform. The videantis solution replaced an incumbent IP block from a major semiconductor IP provider, significantly reducing silicon area while giving the customer broader flexibility for future product updates.

“We selected videantis’ processing solution because of their outstanding performance-power-area (PPA) characteristics, enabling more than 50% optimization against state-of-the-art alternatives on the market. The integration of their solution went easy and the videantis team provided an excellent support, so we are looking forward to extending our cooperation in the future”, said Xikai Zhao, VP of Silicon Design, ASR Microelectronics Co., Ltd.

Explore Deep Learning Processor IP:

• Deep Learning Processor

With more than 25 million vehicles already on the road using videantis technology, the company’s unified processing approach has been proven at automotive scale—where reliability, longevity, and efficiency are paramount. This proven track record has recently opened new opportunities across industrial automation, robotics, drones, electric ground vehicles, and defense applications.

At CES 2026, videantis invites companies developing SoCs and partners in the ecosystem to discuss how the 4th-generation architecture can not only reduce cost and power consumption in advanced SoC programs, but also extend product lifecycles. By enabling ongoing software-based adaptation to fast-changing market and AI workloads, the solution delivers a superior long-term total cost of ownership.

Visit videantis at the EIC Pavilion, Booth #60821, in Eureka Park to learn more.

For more information, please visit https://www.videantis.com.