TSMC Cuts Capex by $1 Billion
Cites faster conversion to 16nm
Alan Patterson, EETimes
4/16/2015 05:43 PM EDT
TAIPEI — Taiwan Semiconductor Manufacturing Co. (TSMC), the world’s largest chip foundry, cut its planned capital expenditure for this year by $1 billion, citing improvements in capital efficiency and a faster-than-expected migration to its leading-edge 16nm process technology.
The company, which in January weighed in with the chip industry’s largest planned layout for expansion this year, said at an announcement of its first-quarter results today that its revised 2015 capex will fall within a range of $10.5 billion and $11 billion.
To read the full article, click here
Related Semiconductor IP
- 1.8V/3.3V I/O library with ODIO and 5V HPD in TSMC 16nm
- 1.8V/3.3V I/O Library with ODIO and 5V HPD in TSMC 12nm
- 1.8V to 5V GPIO, 1.8V to 5V Analog in TSMC 180nm BCD
- 1.8V/3.3V GPIO Library with HDMI, Aanlog & LVDS Cells in TSMC 22nm
- Specialed 20V Analog I/O in TSMC 55nm
Related News
- SMIC cuts capex and R&D
- U.S. to Hold Over 20% of Advanced Semiconductor Capacity by 2030, TSMC Expands Investment to US$165 Billion, Says TrendForce
- Chartered still losing money, cuts capex
- ST to 're-deploy' 1,000 engineers amid Q1 losses, CapEx cuts
Latest News
- Premier ASIC and SoC Design Partner, Sondrel, Rebrands as Aion Silicon
- Intel Financial Risks, Layoffs, Foundry Ambitions
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
- China Takes the Lead in RF Front-End Patent Activity: RadRock and Others Surge Behind Murata
- Arteris Wins Two Gold and One Silver Stevie® Awards in the 2025 American Business Awards®