TSMC: Chip Scaling Could Accelerate
Alan Patterson, EETimes
9/12/2018 00:01 AM EDT
TAIPEI — Chip scaling can double each year if the semiconductor industry pushes forward on a number of new technological fronts, according to TSMC Chairman Mark Liu, speaking at an industry event in Taiwan last week.
That expectation anticipates potentially faster growth for the semiconductor industry even as Moore’s Law is losing steam. Moore’s Law is the observation that transistor density in integrated circuits doubles every two years.
In the future, chipmakers will need to integrate memory and logic to create “true” 3D ICs that result in significant energy savings, said Liu at Semicon Taiwan last week. Moreover, domain-specific architectural innovations that allow software to configure hardware on the fly will also be key to achieving scaling advances.
To read the full article, click here
Related Semiconductor IP
- USB 4.0 V2 PHY - 4TX/2RX, TSMC N3P , North/South Poly Orientation
- Flipchip 1.8V/3.3V I/O Library with ESD-hardened GPIOs in TSMC 12nm FFC/FFC+
- TSMC CLN3FFP HBM4 PHY
- Wi-Fi 7(be) RF Transceiver IP in TSMC 22nm
- 1.8V/3.3V I/O Library with 5V ODIO & Analog in TSMC 16nm
Related News
- Phison Deploys Cadence Cerebrus AI-Driven Chip Optimization to Accelerate Product Development
- Synopsys and Intel Foundry Accelerate Advanced Chip Designs with Synopsys IP and Certified EDA Flows for Intel 18A Process
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Cadence and Samsung Foundry Accelerate Chip Innovation for Advanced AI and 3D-IC Applications
Latest News
- Tata Elxsi and Synopsys Collaborate to Accelerate Software-Defined Vehicle Development through Advanced ECU Virtualization Capabilities
- Arasan Announces immediate availability of its Total IP for Embedded USB2 (eUSB2) with Controller and PHY
- IC’Alps Joins GlobalFoundries GlobalSolutions™ Ecosystem to Accelerate ASIC Development
- Lossless Data Compression Webinar: Choosing Algorithms and IP Core Accelerators
- Akeana kicks off business development program with Intralink in China