TriCN Introduces GDDR-III Interface Technology
SAN FRANCISCO, CA
- February 2, 2004 - TriCN, a leading developer of intellectual property (IP) for high-speed semiconductor interface technology, today announced the immediate availability of its Graphics Double Data Rate (GDDR)-III interface, the latest generation of this technology. Based on the Stub Series Terminated Logic (SSTL)-18 I/Os, TriCN's GDDR-III interface design offers backward compatibility to DDR-II interface technology. The GDDR-III interface is currently available in the TSMC 90nm process, and TriCN has already secured design wins for the product.
The drive of semiconductor developers to improve the performance of Memory interfaces comes in response to the growing demand for bandwidth in the graphics and PC markets. GDDR-III technology is the most recent evolution of the DDR standard, and provides performance improvements over GDDR-II and several varieties of DDR technology. TriCN's GDDR-III interface has a maximum operational bandwidth of 1.6 Gb/second per I/O, providing industry-leading performance for Graphics Memory interfaces.
"High-performance memory interface design continues to be a core competency of TriCN," explains Ron Nikel, co-founder and Chief Technology Officer of TriCN. "With both GDDR-III and DDR-II compatibility, our new product offers designers significant flexibility, plus the added benefit of the industry's leading bandwidth performance."
The GDDR-III interface joins TriCN's growing portfolio of high-performance memory interface products, including DDR SDRAM, DDR II SDRAM, DDR FCRAM, DDR FCRAM II, DDR SRAM, QDR SRAM, QDR II SRAM, RL DRAM, and RL DRAM II.
Availability
TriCN's GDDR-III is immediately available in the TSMC 90 nm process.
About TriCN
Founded in 1997, San Francisco, California-based TriCN is a leading developer of high- performance semiconductor interface intellectual property (IP). The company provides a complete portfolio of IP for maximizing data throughput on and off the chip, ranging from a Base I/O library to multi-gigabit SerDes products. This IP is designed for IC developers addressing bandwidth-intensive applications in the communications, networking, graphics memory, and consumer products space. TriCN's customers range from fabless semiconductor to systems companies and IDMs, including Philips, General Dynamics, SGI, IBM, Cognigine, Internet Machines, and Apple Computer.
All trademarks mentioned herein are the property of their respective owners.
Related Semiconductor IP
- USB 20Gbps Device Controller
- 25MHz to 4.0GHz Fractional-N RC PLL Synthesizer on TSMC 3nm N3P
- AGILEX 7 R-Tile Gen5 NVMe Host IP
- 100G PAM4 Serdes PHY - 14nm
- Bluetooth Low Energy Subsystem IP
Related News
- Faraday Unveils HiSpeedKit™-HS Platform for High-speed Interface IP Verification in SoCs
- Faraday Delivers Latest SerDes IP to Complete Interface Lineup on UMC’s 22nm Platform
- TriCN Introduces GDDR-II Interface Technology
- OPENEDGES announces a strategic partnership with The Six Semiconductor Inc to provide a complete GDDR6 memory interface solution
Latest News
- 2025 TSMC OIP Ecosystem Forum Highlights Aion Silicon’s Leadership in Advanced SoC Design
- Ceva Appoints Former Microsoft AI and Hardware Leader Yaron Galitzky to Accelerate Ceva’s AI Strategy and Innovation at the Smart Edge
- Dnotitia Unveils VDPU IP, the First Accelerator IP for Vector Database
- Ambient Scientific AI-native processor for edge applications offers 100x power and performance improvements over 32-bit MCUs
- Qualitas Semiconductor Signs PCIe Gen 4.0 PHY IP License Agreement with Leading Chinese Fabless Customer