TriCN Introduces GDDR-II Interface Technology
SAN FRANCISCO, CA - June 30, 2002--TriCN, a leading developer of intellectual property (IP) for high-speed semiconductor interface technology, today announced the immediate availability of its GDDR-II (Graphics Double Data Rate) interface, the latest member of the company's Interface-Specific I/O (ISI/O) product family. Based on the Stub Series Terminated Logic (SSTL)-18 interface spec, the GDDR-II interface represents the current generation of interfaces designed to handle I/O-intensive graphics applications.
TriCN's GDDR-II provides 1 Gb/s operation, and supports selectable On Die Termination (ODT) schemes, allowing for backward compatibility with DDR-SDRAM. The product is fully compatible with the JEDEC GDDR-II spec and the DDRII-SDRAM spec.
"Our GDDR-II solution is the most recent example of TriCN's ISI/O approach to interface IP," said Ron Nikel, CTO of TriCN. "This broadens TriCN's product support of graphics interfaces, and combined with our memory, networking, and peripheral interface products, further validates our mission to become our customers' single source for interface IP."
ISI/O: Interface Specific I/O Solutions
TriCN has created a family of validated and complete ISI/Os that are tailored to specific interface applications. Based on generic, broadly applicable interface standards (such as HSTL, SSTL), these products have been developed to account for the complete range of chip and system environmental constraints. This enables seamless integration into chip development, and allows customers to achieve high performance targets, while reducing time to market. In particular, TriCN's ISI/Os are targeted towards communications, memory, and graphics applications, and include products such as DDRII-SDRAM, QDR-SRAM, DDR-FCRAM, SPI-3, SPI-4 (Phase I & II), Low Power LVDS, and HyperTransport.
Availability
TriCN's GDDR-II interface is immediately available for flip chip and bond wire applications in all variations of the TSMC 0.13um process and IBM 0.13 process.
About TriCN
Founded in 1997, San Francisco, California-based TriCN is a leading developer of high- performance semiconductor interface intellectual property (IP). The company provides a complete portfolio of IP for maximizing data throughput on and off the chip, ranging from a Base I/O library to multi-gigabit SerDes products. This IP is designed for IC developers addressing bandwidth-intensive applications in the communications, networking, data storage, and memory space. TriCN's customers range from startup to established fabless semiconductor and systems companies, including Philips, General Dynamics, SGI, IBM, Cognigine, Internet Machines, and Apple Computer.
# # # #
All trademarks mentioned herein are the property of their respective owners.
Related Semiconductor IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- 1G BASE-T Ethernet Verification IP
- Network-on-Chip (NoC)
- Microsecond Channel (MSC/MSC-Plus) Controller
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
Related News
- Faraday Delivers Latest SerDes IP to Complete Interface Lineup on UMC’s 22nm Platform
- TriCN Introduces GDDR-III Interface Technology
- OPENEDGES announces a strategic partnership with The Six Semiconductor Inc to provide a complete GDDR6 memory interface solution
- Internet Machines Selects TriCN I/O Interface Technology for its Network Processing, Traffic Management, and Switching Semiconductors
Latest News
- Virtusa Acquires Bengaluru based SmartSoC Solutions, Establishing Full-Stack Service Offering from Chip to Cloud and Driving Expansion into the Semiconductor Industry
- Consumer Electronics and AI Product Launches Lift 3Q25 Top-10 Foundry Revenue by 8.1%, Says TrendForce
- Joachim Kunkel Joins Quadric Board of Directors
- RaiderChip NPU leads edge LLM benchmarks against GPUs and CPUs in academic research paper
- SEMIFIVE Secures AI Semiconductor Design Projects in Japan, Accelerating Global Expansion with New Local Subsidiary