SystemC seen accelerating simulation
SystemC seen accelerating simulation
By Richard Goering, EE Times
February 26, 2003 (11:25 a.m. EST)
URL: http://www.eetimes.com/story/OEG20030226S0013
SAN JOSE, Calif. SystemC is seeing increasing use as a way of accelerating simulation, according to speakers at the DVCon Design and Verification Conference. Meanwhile, speakers noted important milestones coming up in 2003 for the Open SystemC Initiative's (OSCI) standardization efforts.
Related Semiconductor IP
- HBM4 PHY IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP
- VIP for Compute Express Link (CXL)
- HBM4 Controller IP
Related News
- MachineWare announces new ARM processor simulation and SystemC profiling products, adds Windows support
- Net processors seen morphing into SoC
- Sun, ARM rewrite the rules for accelerating Java
- Synopsys and OCP-IP Members Jointly Develop SystemC Modeling Methodology for OCP-Based SoC Design
Latest News
- TSMC to Lead Rivals at 2-nm Node, Analysts Say
- Energy-efficient RF power modules developed using SOI technology
- Quintauris Demonstrates RISC-V Innovation in Automotive at CES
- UMC Reports Sales for December 2025
- Tenstorrent unveiled its first-generation compact AI accelerator device designed in partnership with Razer™ today at CES 2026