Stratosphere Solutions Sets Sights on Design For Yield Market With Launch of StratoPro
Sunnyvale, Calif. - April 3, 2006
- Stratosphere Solutions Inc., a startup providing yield improvement products, today announced that it is delivering silicon intellectual property (IP) tools, proven at sub-100 nanometer process technologies, for semiconductor manufacturers to accelerate process and design yield ramps.
The StratoPro™ platform enables design for manufacturability (DFM) and design for yield (DFY) because it characterizes process variability using high-resolution measurements derived from unique silicon IP developed by Stratosphere Solutions.
“In a highly competitive environment, we are delivering mission-critical products that semiconductor manufacturers are rapidly adopting and willing to pay for,” affirms Robert (Bob) Smith, chief executive officer (CEO) of Stratosphere Solutions. “We are the only company that provides a proven sub-100 nanometer silicon IP product for the fabs that delivers comprehensive data for characterizing variability.”
The Market
Yield is a critical consideration for the semiconductor industry because it drives cost, offers competitive advantages and shows process maturity. Yield fallout due to process variability is a problem that both semiconductor manufacturers and designers must contend with in sub-100 nanometer process technologies. Process variability can lead to undesirable shifts in electrical behavior that reduce the yield and/or performance of a design. Characterizing these parametric failure mechanisms using traditional approaches has become prohibitively expensive.
DFM approaches are well understood and design flows are being put in place to ramp yields. However, DFM does not fully address the parametric yield problem because it relies on deterministic physical and optical models. Conversely, comprehensive yield analysis requires statistical information. The semiconductor industry lacks both the statistical tools and models for ramping parametric yields, and the need is reaching critical proportions. Statistical parametric characterization based on actual measured silicon data is key to comprehending and reducing design-related yield loss.
Stratosphere Solutions’ Approach
Stratosphere Solutions is delivering a silicon-proven platform that addresses parametric yield during both design and manufacturing. It brings together three elements:
- Comprehensive characterization of process variability using measurements derived from silicon
- Analysis, quantification and modeling of yield based on process variability
- Optimization of design performance using yield models
Stratosphere Solutions believes that yield must be managed through a holistic and collaborative approach that spans design and manufacturing.
The Product
The company’s first product, StratoPro, offers the combination of a silicon IP platform coupled with applications that characterize within-die device variability enabling parametric yield analysis. Used for statistical process characterization, the platform offers a consistent architecture for process technology development and production environments. Its architecture lowers yield ramp costs by dramatically reducing the amount of silicon area required per test structure while allowing large statistical sample sizes. It is fully testable using standard parametric test hardware.
“New material systems and ever-shrinking critical dimensions in sub-100 nanometer process technologies have introduced a variety of new sources of parametric and systematic yield loss,” says Dr. Scott Thompson, a noted expert in semiconductor manufacturing and associate professor of Electrical Engineering at the University of Florida, Gainesville. “StratoPro is ideally suited for providing critical within-die statistics of many important electrical metrics of process variability and parametric yield.”
Manufacturers can incorporate StratoPro IP on their test vehicle, manufacture it and test it using StratoPro test programs. The measured output is incorporated into the manufacturer’s yield management system (YMS). Out-of-the-box StratoPro analysis methods are integrated into the manufacturer’s YMS, producing robust variability analysis results.
StratoPro is available in both a full reticle version, typically utilized during early development and yield ramp, and a scribe line version, most useful for production monitoring. Under development is a yield modeling environment that will leverage StratoPro and enable fabs to provide designers with comprehensive yield models without divulging trade secret information. More details will be available later in 2006.
Pricing and Availability
StratoPro is available now and is licensed per process node and fab site. The U.S. list price starts at $350,000 for a perpetual license. Term licenses are also available. Annual maintenance and integration services are extra.
For more details, contact Prashant Maniar, Stratosphere Solutions’ chief strategy officer. He can be reached at (408) 202-7381 or via email at maniarp@stratosol.com.
About Stratosphere Solutions Stratosphere Solutions Inc. provides innovative yield improvement products to semiconductor manufacturers. The company’s StratoPro product delivers a unique combination of a silicon-proven intellectual property (IP) platform and applications that enables manufacturers to accurately characterize process variations for sub-100 nanometer processes. Founded in 2004 by semiconductor manufacturing and electronic design automation (EDA) experts, its customer base includes leading worldwide semiconductor manufacturers. Corporate headquarters are located at: 830 Stewart Drive, Suite B10, Sunnyvale, Calif. 94085. Telephone: (408) 701-1418. Facsimile: (408) 730-5889. Email: info@stratosol.com. Website: http://www.stratosol.com
Related Semiconductor IP
- Root of Trust (RoT)
- Fixed Point Doppler Channel IP core
- Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
- Polyphase Video Scaler
- Compact, low-power, 8bit ADC on GF 22nm FDX
Related News
- Ittiam sets sights on becoming India's DSP leader
- Vennsa Technologies Sets Sights on Moving Chip Verification Beyond Debug
- Renesas Sets Sights on Intersil
- Siemens collaborates with PDF Solutions to boost IC yield and speed time to market
Latest News
- How hardware-assisted verification (HAV) transforms EDA workflows
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura’s Cyberthreat Intelligence Tool
- Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
- CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology