Shanghai Seeks 'More-than-Moore' in Silicon Valley
“Angel investors like us have stepped up.”
Junko Yoshida
10/19/2015 08:52 AM EDT
MADISON, Wis. — In a global quest for “More-than-Moore” innovations, the Shanghai Industrial Technology Research Institute (SITRI) has come to Silicon Valley to open a hardware accelerator in Belmont, Calif.
The Chinese research institute designed, built and recently opened an incubator, called SITRI Innovations, to support hardware entrepreneurs who are developing and commercializing “More-than-Moore” devices.
This SITRI initiative isn’t just about China wanting to pick Silicon Valley’s brains. Among the promoters of SITRI Innovations is Kurt Petersen, largely known to the industry as the father of MEMS and now on the SITRI advisory board. His big idea is to leverage SITRI to re-ignite VCs’ investment in hardware.
To read the full article, click here
Related Semiconductor IP
- Rad-Hard GPIO, ODIO & LVDS in SkyWater 90nm
- 1.22V/1uA Reference voltage and current source
- 1.2V SLVS Transceiver in UMC 110nm
- Neuromorphic Processor IP
- Lossless & Lossy Frame Compression IP
Related News
- Synopsys Announces New AI-Driven EDA, IP and Systems Design Solutions At SNUG Silicon Valley
- Numem at the Design & Reuse IP SoC Silicon Valley 2024
- Baya Systems, Imagination Technologies and Andes Technology to Present on Heterogeneous Compute Architectures at Andes RISC-V CON Silicon Valley
- ISS expands Silicon Valley operations with appointment of Joe O'Neill as VP of Worldwide Sales
Latest News
- SignatureIP Achieves PCI-SIG® PCIe® 5.0 Certification, Joining Elite Group on Official Integrators List
- GUC Monthly Sales Report – August 2025
- eSOL and Infineon Enter Strategic Partnership for Next-generation Automotive Platforms Based on RISC-V/TriCore/Arm Microcontrollers
- Synopsys and GlobalFoundries Establish Pilot Program to Bring Chip Design and Manufacturing to University Classrooms
- Cadence to Acquire Hexagon’s Design & Engineering Business, Accelerating Expansion in Physical AI and System Design and Analysis