There's More to The RISC-V China Story
By Junko Yoshida, EEtimes
November 22, 2018
Being a reporter is like being the guy who’s trying to bail out the ocean. I know that there is always more to the story than the copy I just filed. My recent blog about RISC-V activities in China is typical.
As soon as my piece, entitled “Why RISC-V Lags in China,” posted on EE Times’ website, I got blowback from Yungang Bao, a professor at the Institute of Computing Technology, Chinese Academy of Sciences in Beijing.
He requested that I set the record straight on three points.
To read the full article, click here
Related Semiconductor IP
- RISC-V Debug & Trace IP
- Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
- Compact Embedded RISC-V Processor
- Multi-core capable 64-bit RISC-V CPU with vector extensions
- 64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
Related News
- China Bets on Homegrown Chip Tech With RISC-V Push
- A 10-cent RISC-V microcontroller from China? Why not?
- RISC-V Solidifies Presence in China as Global Momentum Builds
- China Unyielding Ascent in RISC-V
Latest News
- EMASS Tapes Out 16nm ECS-DoT, Advancing Always-On Edge AI
- Telechips and DivX Renew IC Technology Licensing Agreement
- OIF Demonstrates Industry-Wide Interoperability at Scale at OFC 2026, Advancing Energy Efficiency, Performance and Capacity for AI-Era Data Center Networks
- Eliyan Secures $50 Million in Strategic Investments from Leading Hyperscalers and AI Infrastructure Providers to Accelerate Scalable AI Systems
- FuriosaAI ships RNGD, data-center-ready AI inference GPU alternative