Real Intent Awarded U.S. Patent for Methods and Systems for Correcting X-pessimism in Gate-level Simulation or Emulation
Company's 7th patent addresses correcting X-pessimism in gate-level verification
SUNNYVALE, CALIF, USA -- June 7, 2018 -- Real Intent Inc. has been awarded U.S. patent 9,965,575 for methods and systems for correcting X-pessimism in gate-level simulation or emulation. This 7th patent by Real Intent is directed to its core technology for the functional verification and sign-off of digital logic used in design IP and SoCs. Gate-level netlist simulation treats unknown values ("Xs") pessimistically, producing results which are not the same as actual hardware and inconsistent with RTL simulation. Netlist sign-off is a key milestone prior to tape-out, and X-pessimism-free analysis is a key requirement for this milestone. Achieving accuracy in gate-level simulation is a major impediment to sign-off, which is Real Intent's primary focus.
"The award of this 7th patent demonstrates our technology leadership in digital verification, and our ability to innovate as we deliver best-in-class solutions for key problems like X-pessimism," said Dr. Pranav Ashar, Real Intent's Chief Technology Officer. "Our customers demand that X-pessimism correction be automatic, work on-the-fly, and deliver the scale and efficiency that makes full-chip gate-level analysis truly viable. Real Intent's solution ensures that hardware engineers see only the accurate circuit-behavior in verification, delivered via the fastest analysis that saves months of sign-off effort and gives them a key competitive edge."
About Real Intent
Real Intent is the industry leader in static sign-off of digital designs. Companies worldwide rely on Real Intent's innovative EDA software to accelerate early functional verification and sign-off at RTL and gate-level. Its intent-driven static technology powers solutions for clock and reset domain crossing analysis (CDC, RDC), cleaned-up RTL code, and X-pessimism correction, to ensure design success for SoCs and FPGAs. Real Intent products lead the market in performance, capacity and accuracy, and provide a faster time to tape out. Please visit www.realintent.com for more information.
Related Semiconductor IP
- Xtal Oscillator on TSMC CLN7FF
- Wide Range Programmable Integer PLL on UMC L65LL
- Wide Range Programmable Integer PLL on UMC L130EHS
- Wide Range Programmable Integer PLL on TSMC CLN90G-GT-LP
- Wide Range Programmable Integer PLL on TSMC CLN80GC
Related News
- Real Intent describes Verix verification tool
- Real Intent describes Verix verification tool
- Real Intent announces industry's first intent-driven verification system
- Real Intent Introduces Verification Service Partners Program
Latest News
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- The world’s first open source security chip hits production with Google
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing