QuickLogic picks MIPS, PixelFusion opts for ARC

QuickLogic picks MIPS, PixelFusion opts for ARC
By Michael Santarini, EE Times
June 19, 2000 (12:10 p.m. EST)
URL: http://www.eetimes.com/story/OEG20000619S0006

Programmable-logic vendor QuickLogic Corp. and MPU core vendor MIPS Technologies Inc. have signed a license agreement that provides QuickLogic with the MIPS32 4Kc and an option on the MIPS64 5K embedded processor cores. According to the companies, the agreement enables the development of a platform to embed a MIPS-based processor with high-performance programmable logic and on-chip dual-port SRAM, laying the foundation for a whole new class of system-level embedded standard products (ESPs). QuickLogic and MIPS hope the programmable-logic-based solution will help developers create MIPS32- and MIPS64-based systems more quickly, accelerating time-to-market.

The new class of ESPs created from this agreement will target digital subscriber line and cable modem head-end equipment, Internet routers, fiber-optic telecommunications switches, wireless basestation equipment and set-top boxes, the companies said.

For more information visit (www.quicklogic.com ) or ( www.mips.com).

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Processor core vendor ARC Cores and PixelFusion have announced that the Fuzion 150 implements ARC's user-configurable 32-bit CPU. A programmable computing device, this 0.25-micron, single-chip, massively parallel single-instruction, multiple-data processor packs 24 Mbits of on-chip embedded DRAM.

The companies said the ultrahigh-performance chip delivers more than 1.5 trillion operations or 3 billion floating-point operations per second, along with 600 Gbytes/s of on-chip memory bandwidth. The companies said ARC's 32-bit microprocessor was essential to the operation of the Fuzion chip, since it is used both for managing the hardware elements and as the central controller for the software. Visit ( www.pixelfusion.com ) for further information.