QuickLogic in licensing deal with MIPS

QuickLogic in licensing deal with MIPS
By Mark Hachman, EBN
April 5, 2000 (2:51 p.m. EST)
URL: http://www.eetimes.com/story/OEG20000405S0025

QuickLogic Corp. has signaled the addition of a new product family by announcing a licensing agreement with embedded-core provider MIPS Technologies Inc.

QuickLogic, Sunnyvale, Calif., earlier had designed products based on its Embedded Standard Product (ESP) technology, which dedicates a fixed amount of logic to a particular functional block and surrounds it with programmable logic and/or memory.

The company plans to adopt a similar strategy with the 32-bit MIPS 4Kc, and has the option to license the 64-bit MIPS64 cores as well.

QuickLogic's previous product lines featured QuickRAM, programmable logic married to about 28 Kbits of silicon; QuickPCI, which uses a standard PCI-bus interface; and QuickDSP, which integrates a DSP core, said Chuck Tralka, director of strategic marketing.

“We'd been looking for some time for more system-level silicon,” he said. “We began shopping around and chose MIPS for a number of reasons,” including the architecture's low power consumption and the availability of software tools and support, he said. “It's a great fit to our business model.”

Because QuickLogic has not yet announced the product family, Tralka declined to disclose details of the core's implementation, such as the manufacturing process or the timing of product releases. However, like MIPS, QuickLogic has contracted with foundry Taiwan Semiconductor Manufacturing Co. Ltd. MIPS, Mountain View, Calif., has also agreed to license selected cores from TSMC to enable both companies' customers to ship products to market faster.

QuickLogic's products are manufactured on a four-layer metal, 0.35-micron transistor technology, and the company says it is moving to a five-layer, 0.25-micron process.

The combination of the MIPS/TSMC agreements, the QuickLogic license, and MIPS' existing arrangements with foundry partners offers designers a compelling design path, according to Tom Halfhill, embedded-microprocessor analyst at MicroDesign Resources Inc., Sunnyvale. A designer not only can quickly verify a MIPS-based design using the QuickLogic model, but software testing and verification can begin while the ASIC is being fabricated, he said.

Tralka said QuickLogic's competitive advantage has been to implement these standard cores inside a programmable environment, but not as an FPGA or ASIC. “Our approach is to counter the belief that it's too big or too complex to do efficiently inside programmable logic,” he said.