Poseidon Announces the Second Generation of Hardware Accelerator Synthesis for Processor-Based Designs
San Jose, CA – July 25, 2006
– Poseidon Design Systems today announced the release of the second generation Triton Builder tool. This enhancement supports the generation of a fully pipelined hardware accelerator to increase the performance of Poseidon’s automated solutions by an additional 3-10X over our existing market leading technology. With this solution designers can easily get between 10-450X performance increases from standard ANSI C algorithms. This new performance capability enables a whole new class of video, multimedia and imaging applications to be implemented with embedded processor architectures, thereby increasing flexibility and decreasing time to market.
Poseidon will be showing a demonstration of a color conversion and DCT applications at the 2006 Design Automation Conference. This application was generated using the Triton Tuner and Builder tool suite with just 2 man weeks of effort. The resultant solution is implemented on a Virtex 4 platform using the PowerPC core from Xilinx and exhibits a 14X performance increase over the software running on the processor.
Poseidon’s Triton tool suite is comprised of two tools, Tuner and Builder, which provides the designer with the ability to fully develop an efficient processor-based architecture. Poseidon’s Tuner tool offers hardware and software architects an easy to use SystemC simulation environment to quickly analyze and optimize complex software, architectures and systems. With the Builder Tool, time critical algorithms can also be partitioned and migrated from software into dedicated hardware solutions with an efficient hardware accelerator. Through hardware acceleration significant increases in performance can be obtained along with reductions in power and development time. With Poseidon Triton tools designers can tradeoff Performance, power and cost. These tools support ARM, PowerPC, MicroBlaze and Nios II architectures on ASIC and FPGA platforms. The solutions are optimized for video, VoIP, audio, imaging, wireless, networking, and security devices.
About Poseidon Design Systems
Poseidon is an Electronic Design Automation and Service company with offices in Atlanta, GA., San Jose, CA, and Bangalore, India. Founded in July 2002, Poseidon provides products and services for modeling and designing processor-based SoCs. Poseidon's Electronic System Level tools allow users to rapidly analyze, optimize and accelerate a complete SoC system. For additional information about Poseidon Design Systems, visit www.poseidon-systems.com.
Related Semiconductor IP
- JESD204D Transmitter and Receiver IP
- 100G UDP IP Stack
- Frequency Synthesizer
- Temperature Sensor IP
- LVDS Driver/Buffer
Related News
- Mentor's Catapult HLS enables Chips&Media to deliver deep learning hardware accelerator IP in half the time
- Intilop Delivers Their Enhanced One Thousand TCP/UDP Session Hardware Accelerator and Kernel Bypass Linux Driver for Hyper-Performance Networking Systems
- Blockchain Hardware Accelerator from Silex Insight is now available on AWS Marketplace
- Aldec Introduces Hardware Assisted RTL Simulation Acceleration for Microchip FPGA Designs
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers