Motorola SPS offers SoC reuse standards

Motorola SPS offers SoC reuse standards
By Darrell Dunn, EBN
December 15, 1999 (5:19 p.m. EST)
URL: http://www.eetimes.com/story/OEG19991215S0030

Motorola Inc.'s Semiconductor Products Sector (SPS) has released two standards as part of its planned Semiconductor Reuse Standards (SRS) series, which are aimed at creating a set of industry guidelines for systems-on-a-chip (SoC) intellectual property (IP) modules.

Motorola has released the IP and virtual-component-block (VC) deliverables and the Verilog hardware descriptive language (HDL) coding standards. The data is being made available to other companies, universities, and IP providers to enable them to create standard reusable design blocks.

"Motorola's SRS is one of the most impressive sets of VC and SoC standards we've ever seen in terms of overall vision, completeness, consistency, content, and clarity," said Larry Rosenberg, chair of the Virtual Socket Interface Alliance (VSIA) technical committee, and Larry Cooke, founding chair for VSIA's On-Chip-Bus development working group in a prepared statement following a consultant visit to SP S in Austin, Texas.

In conjunction with the IP Interface standard released previously, the two new standards will enable IP developers to create SRS-compliant soft IP which can interface to Motorola's core architectures.