MIPS Technologies' 550 MHz Core Family Features OCP Interface Standard

The new high performance MIPS32® 24K™ processor core family from MIPS Technologies, Inc. (Nasdaq: MIPS; see companion announcement) is the first core family to use the on-chip interconnect technology developed by the Open Core Protocol International Partnership (OCP-IP) as its native interface, the companies announced today. The OCP standard facilitates "plug-and-play" SOC design, and helps customers exploit the new core family's advanced architectural features, reduce development time and lower overall design costs.

OCP-IP is a leading industry association delivering a common standard for intellectual property (IP) core interfaces. The OCP standard reduces development time and lowers risk and costs by allowing designers who use the 24K core to reuse OCP-compliant cores across multiple MIPS-Based™ SOCs. OCP also eliminates the need to repeatedly modify the core and preserves the verification and test benches by defining all of the core's natural interface capabilities in a standardized way. These interface definitions enable third party verification IP and tools to transparently adjust to the precise requirements of each IP. Furthermore, customers can take advantage of MIPS Technologies' SOC-it™ system-level controller optimized for OCP, which provides a tightly coupled memory controller and includes a bridge to other on-chip system buses.

"Standard interfaces and buses are critical in meeting the challenges of increasingly complex SOC design and shrinking market windows, and MIPS Technologies is pleased to support OCP-IP's effort to make plug-and-play SOC design a reality," said Tom Petersen, director of product marketing at MIPS Technologies. "Customers who choose to take advantage of OCP can bring their powerful 24K core-based designs to market quickly, easily and efficiently, with less risk and lower cost."

"We are delighted to have OCP featured as the native interface in the industry's highest performance 32-bit cores," said Ian Mackintosh, president of OCP-IP. "By utilizing OCP, customers of the 24K cores can free up critical engineering resources and more quickly achieve their design goals."

About the MIPS32 24K Core Family
The MIPS32 24K core family, which includes the 24Kc™, 24Kc Pro, 24Kf™ and 24Kf Pro versions, offers performance from 400 to 550 MHz worst case in a 0.13 micron process, the highest frequency available in 32-bit synthesizable cores for embedded markets, while minimizing design time and reducing product costs. Tailored SOC design methodologies, an Open Core Protocol (OCP) interconnect structure, standard libraries and on-chip memories from industry-leading companies help speed time-to-market, an important advantage for a processor core suited to embedded consumer applications such as digital and interactive TVs, set-top boxes and DVD players. For more information, visit the MIPS Technologies Website or contact the company at +1 650 567 5000 or email at sales@mips.com.

About OCP-IP
The OCP International Partnership Association, Inc. (OCP-IP) was announced in December 2001 to promote and support the open core protocol (OCP) as the complete socket standard that ensures rapid creation and integration of interoperable virtual components. OCP-IP's Governing Steering Committee participants are: Nokia, Texas Instruments, STMicroelectronics, United Microelectronics Corporation, Toshiba Semiconductor Group (including Toshiba America TAEC), Sonics and other industry leading companies. OCP-IP is a non-profit corporation delivering the first fully supported, openly licensed core-centric protocol that comprehensively fulfills system-level integration requirements. The OCP facilitates IP core reusability and reduces design time and risk, along with manufacturing costs for SOC designs. VSIA endorses the OCP socket, and OCP-IP is an Adoption Group of the VSI Alliance. For additional background and membership information, visit www.OCPIP.org.

About MIPS Technologies
MIPS Technologies, Inc. is a leading provider of industry-standard processor architectures and cores for digital consumer and business applications. The company drives the broadest architectural alliance that is delivering 32- and 64-bit embedded RISC solutions. The company licenses its intellectual property to semiconductor companies, ASIC developers and system OEMs. MIPS Technologies and its licensees offer the widest range of robust, scalable processors in standard, custom, semi-custom and application-specific products. The company is based in Mountain View, Calif., and can be reached at +1 (650) 567-5000 or www.mips.com.