Intel: 450-mm wafers must wait on 10-nm
Peter Clarke, EETimes
2/28/2011 3:39 PM EST
GRENOBLE, France – The 10-nm process node appears to be the ideal point for the adoption of manufacturing on 450-mm diameter wafers, according Leonard Hobbs, head of research for Intel Ireland. Speaking at the Industry Strategy Symposium here (ISS Europe) he also indicated that the transition could not come sooner and could be pushed later, depending on the efficacy of industry collaboration.
Hobbs portrayed the transition taking place 2015 to 2017.
To read the full article, click here
Related Semiconductor IP
- Root of Trust (RoT)
- Fixed Point Doppler Channel IP core
- Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
- Polyphase Video Scaler
- Compact, low-power, 8bit ADC on GF 22nm FDX
Related News
- SJSemi and Qualcomm Jointly Announce Qualification of 10nm Ultra-high Density Wafer Bumping Technology
- Wafer Capacity by Feature Size Shows Rapid Growth at <10nm
- Wafer Capacity by Feature Size Shows Strongest Growth at <10nm
- Commentary: Get ready for 450-mm fabs
Latest News
- How hardware-assisted verification (HAV) transforms EDA workflows
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura’s Cyberthreat Intelligence Tool
- Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
- CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology