Intel: 450-mm wafers must wait on 10-nm
Peter Clarke, EETimes
2/28/2011 3:39 PM EST
GRENOBLE, France – The 10-nm process node appears to be the ideal point for the adoption of manufacturing on 450-mm diameter wafers, according Leonard Hobbs, head of research for Intel Ireland. Speaking at the Industry Strategy Symposium here (ISS Europe) he also indicated that the transition could not come sooner and could be pushed later, depending on the efficacy of industry collaboration.
Hobbs portrayed the transition taking place 2015 to 2017.
To read the full article, click here
Related Semiconductor IP
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
- 10-bit Pipeline ADC - Tower 180 nm
- NoC Verification IP
- Simulation VIP for Ethernet UEC
- Automotive Grade PLLs, Oscillators, SerDes PMAs, LVDS/CML IP
Related News
- SJSemi and Qualcomm Jointly Announce Qualification of 10nm Ultra-high Density Wafer Bumping Technology
- Commentary: Get ready for 450-mm fabs
- Intel, Samsung Electronics and TSMC Reach Agreement for 450mm Wafer Manufacturing Transition
- UMC tips roadmap, questions 450-mm
Latest News
- GlobalFoundries Appoints Matthew Zack as Chief Corporate Development Officer
- VeriSilicon’s NPU IP VIP9000NanoOi-FS has achieved ISO 26262 ASIL B certification
- NVIDIA and Synopsys Announce Strategic Partnership to Revolutionize Engineering and Design
- Presto Engineering Group Acquires Garfield Microelectronics Ltd, Creating Europe’s Most Comprehensive ASIC Design to Production One-Stop-Shop
- Qualitas Semiconductor Demonstrates Live of PCIe Gen 6.0 PHY and UCIe v2.0 Solutions at ICCAD 2025