INNOSILICON Announce the World's First GF14nm DDR4/LPDDR4 PHY &Controller IP Silicon Proven
Mar 28, 2016 -- INNOSILICON, a word class, fabless design company focusing on high-speed PHY and mixed-signal IP, proudly announces the world’s first DDR4/LPDDR4 PHY & Controller IP combination that has been successfully proven in GLOBALFOUNDRIES 14nm LPP process. This DDR interface solution, which is backwards compatible to DDR3/LPDDR3, maintains low power, high performance and a small form factor. What’s more, our IP combination is optimized for the RAM market, satisfying the demanding data bandwidth requirements of various applications including mobile, cloud computing and networking.
Performance of this IP combination in wirebond configuration can reach speeds up to 2667 Mbps, and flipchip implementations will be even faster. Leveraging a choice of DFI V2.0/V2.1/V3.0/V3.1 standards, the PHY can be integrated either with our companion memory controller or any major 3rd party controller offering. In addition, customization and integration service are always available.
Related Semiconductor IP
- Embedded USB2 (eUSB) Controller + PHY IP
- I2S PHY & Controller
- I3C PHY & Controller
- I2C PHY & Controller
- SD UHS2 PHY & Controller
Related News
- Arasan Announces immediate availability of its Total IP for Embedded USB2 (eUSB2) with Controller and PHY
- Qualitas Semiconductor Signs Licensing Agreement with Chinese SoC Company for DSI-2 Controller and MIPI PHY IP
- HDMI 2.0 Tx PHY in 12FFC along with Controller IP Core with high lossless Audio/Video data transfer, licensed for a 4KTV SoC
- GbE (10/100/1000Base-T) PHY IP Cores with matching 1G Ethernet MAC, PCS and TSN MAC Controller IP Cores for all your high-speed Ethernet Networking applications is available for immediate licensing
Latest News
- BrainChip Expands Global Reach, Announces Akida Boards and AI Development Kits Available at DigiKey
- Qualitas Semiconductor Successfully Demonstrates Live UCIe PHY IP at AI Infra Summit 2025
- Silicon Creations Announces 1000th Production FinFET Tapeout at TSMC and Immediate Availability of Full IP Library on TSMC N2 Technology
- Intel and NVIDIA to Jointly Develop AI Infrastructure and Personal Computing Products
- Comcores MACsec IP is compliant with the OPEN Alliance Standard