TranSwitch to Present Industry Leading HDMI / DisplayPort Solutions at SoCIP 2008 Conference in Beijing and Shanghai
SHELTON, CT – October 13, 2008
– TranSwitch® Corporation (NASDAQ: TXCC), a leading provider of carrier-class semiconductor solutions for the converging voice, data and video network will be a featured exhibitor and presenter at the SoCIP 2008 conference and exhibition to be held in Beijing and Shanghai on October 13th and 15th respectively. SoCIP targets the fast growing semiconductor market in China, bringing together system-on-a-chip (SoC) designers/professionals, intellectual property suppliers and SoC solution vendors.
The TranSwitch booth at SoCIP will feature live demonstrations of the HD-PXL-1.3 technology operating on the company’s flexible development platform. Conference attendees will have the opportunity to witness the superior performance characteristics of the technology under real-world conditions using state-of-the-art advanced HDMI test equipment.
TranSwitch, a featured presenter at the SoCIP seminar, will unveil HDP - its next generation PHY technology. HDP is a unified solution, simultaneously addressing both HDMI and DisplayPort applications.
In April, TranSwitch introduced its family of HD-PXL-1.3 HDMI IP cores, the industry’s first IP cores capable of 10.5 Gbps speeds. Using proprietary Digital Signal Processing (DSP) technology, these cores achieve industry leading performance, running at aggregated speeds of up to 10.5 Gbps and supporting color depths of up to 16 bits, while providing low power consumption and small die size.
The TranSwitch PHY cores incorporate a number of unique features that enhance signal integrity and provide a high degree of control over various signal parameters, enabling robust, error-free video transmission over a wide spectrum of cables, connectors, and speeds.
TranSwitch provides a comprehensive package of deliverables to assist customers through all phases of development, design integration and manufacturing of their SoC. This package includes a development platform, as well as all documentation and models of the IP, which allows customers to easily integrate the HD-PXL-1.3 IP cores into complex SoC designs so they can get to market more quickly.
Related Semiconductor IP
- HDMI
- HDMI 1.4/2.0 Transmitter PHY
- 1-port Receiver or Transmitter HDCP 2.3 on HDMI 2.1 ESM
- HDMI 2.0/MHL RX Combo 1P PHY 6Gbps in TSMC 28nm HPC 1.8V, North/South Poly Orientation
- HDMI 2.0 RX PHY in SS 8LPP 1.8V, North/South Poly Orientation
Related News
- Mentor Graphics Delivers First HDTV Platform for the Accelerated Verification of HDMI and DisplayPort Products
- HDL Design House announces new TX and RX controller cores for the HDMI and DisplayPort standards
- ST first to bridge DisplayPort and HDMI for seamless connectivity
- USB, MIPI, Ethernet, DisplayPort, PCIe, DDR, HDMI, ONFi Analog Phy IP Cores silicon proven in UMC 28nm & UMC 40nm Process
Latest News
- How hardware-assisted verification (HAV) transforms EDA workflows
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura’s Cyberthreat Intelligence Tool
- Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
- CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology