HDL Design House announces the US representative - AJTechnology
Belgrade, Serbia, August 08th, 2012 – HDL Design House, provider of high performance digital and analog IP cores and SoC design and verification services, announced that it has signed a representative agreement with Mr John Patterson, the founder of AJ Technology, a sales representative firm with the principal goal of addressing the increase in demand for intellectual property.
"I've chosen to work closely with HDL Design House, as they have one of the broadest selection of PHYs, Serdes, complimentary controller technology, also offering integration services and maintenance and support. HDL Design House can service a broad range of customers in the US who are looking for the complete solution," said Mr John Patterson.
"We are extremely pleased that AJTechnology will be in charge of the representation of HDL Design House products and service. With Mr Patterson's considerable knowledge of the US market based on fifteen years of experience, and HDL Design House expertise in major protocols and corresponding IP cores, we will be able to solve the problems and answer the needs of potential customers in the US, also providing them with responsible support, at competitive prices," said Mr Predrag Markovic, HDL Design House President and CEO.
About HDL Design House:
HDL Design House delivers leading-edge digital and analog, design and verification services and products in numerous areas of SoC and complex FPGA designs. The company also develops IP cores and component (VITAL) models for major SoC product developers. Founded in 2001 and currently employing 60 engineers working in two design centers in Serbia, HDL Design House mission is to deliver high quality products and services, with flexible licensing models, competitive pricing and responsible technical support. The company was awarded ISO 9001:2000 and ISO 27001:2005 certifications in December 2006 and has achieved certifications from Direct Assessment Services (DAS). For more information, please visit www.hdl-dh.com
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- AVSBus v1.4.1 Verification IP
- Flipchip 1.8V/3.3V I/O Library with ESD-hardened GPIOs in TSMC 12nm FFC/FFC+
- DDR5 MRDIMM PHY and Controller
- APV - Advanced Professional Video Codec
Related News
- Mentor Graphics introduced v5.2 of its FPGA Advantage HDL design flow
- TransEDA Launches New Rule-Sets In ``Ready-To-Use'' HDL Checking Software
- Alatek Boosts Performance of Mentor Graphics® HDL Simulators By 100x
- Alatek Inc. Announces New LINUX Hardware Accelerator Speeds HDL Simulators
Latest News
- Consumer-Tech Brand, Nothing, Taps Ceva’s RealSpace Software to Bring Immersive Spatial Audio to Headphones and Earbuds
- Tenstorrent Acquires Blue Cheetah Analog Design
- Quintauris and WITTENSTEIN high integrity systems Partner to Advance Safety-Critical RISC-V Solutions for Automotive Applications
- Codasip board initiates an expedited process to sell the company
- Chips&Media’s New APV CODEC Delivers Extreme Visual Quality to the Android Industry