First Public Demonstration Of Elixent’s Reconfigurable D-Fabrix Technology

JPEG implementation demonstrated at CEATEC, Japan

Bristol, October 14, 2002: Elixent’s first public demonstration of its reconfigurable algorithm processing (RAP) technology took place last week at the CEATEC show in Japan. The company used its RAP technology to take an image and encode it via JPEG using a single piece of silicon running the different algorithms needed for this task. The demonstration clearly showed the performance and die area improvements possible with reconfigurable technology.

The demonstration utilised an Elixent test chip and involved encoding a JPEG image using five separate configurations of the same RAP array. The chip was originally configured as a virtual hardware DCT engine, then reconfigured as a virtual hardware quantizer and so on, illustrating the flexibility of the array. The implementation could have been done with fewer configurations but the benefits would not have been so clearly shown. The demonstration chip achieved a throughput of 1/2 RGB pixel per clock cycle, providing a total throughput of 30Mpixels/sec at only 60 MHz, giving significant savings in power consumption.

"We’re very excited to have clearly shown that our D-Fabrix RAP technology works and can really compete in the high-volume consumer marketplace," said Kenn Lamb, CEO at Elixent. "The JPEG implementation that we’ve demonstrated is only the tip of the iceberg. A multitude of consumer products are going to benefit from the smaller die area, high performance and true product flexibility that Elixent’s technology can offer."

Elixent were invited to participate on the Department of Trade and Industry (DTI) stand at the show as one of the top ten UK technology companies whose innovation and vision was felt most representative of the image of the UK by the DTI. The DTI and their subsidiary, the Japanese Electronics Business Association (JEBA) fully supported Elixent and were instrumental in assisting with logistics, allowing the company to demonstrate its D-Fabrix technology at CEATEC.

About Elixent’s reconfigurable algorithm processing architecture
Elixent’s D-Fabrix reconfigurable algorithm processing (RAP) architecture utilises an array of 4-bit arithmetic logic units (ALUs), register and memory blocks that may be combined to support variable data word widths. The ALUs are positioned in the style of a chessboard, alternating with adjacent ‘switchboxes’. The D-Fabrix technology supports a new class of platform devices that can be truly multi-functional and have the ability to support multiple applications, adapting efficiently to changing specifications.

About Elixent
Elixent is a leader in reconfigurable semiconductor IP. D-Fabrix, the company’s patented reconfigurable algorithm processing (RAP) technology will provide solutions for companies producing electronic products for imaging and communications applications in consumer and industrial markets. Visit www.elixent.com for more information.