Dolphin Integration announces the availability of its RISC-V subsystem: RV32 Tornado
Meylan, France - May 28, 2018 -- Dolphin Integration, a major leader in energy-efficient IPs, announces the availability of its RISC-V subsystem called RV32 Tornado.
This MCU subsystem has been designed to fit the IoT requirements in terms of area and low-power consumption. It is fully configurable to enable a fast design-in and fast time-to-market. The RV32 Tornado subsystem embeds:
- an adapted version of thePULP zero-riscy core from ETH-Zurich
- a typical set of peripherals: GPIO, UART, SPI, I2C, Timers and watchdog
- standard AHB/APB interfaces
- an ultra-low power cache controller
- a debug unit with JTAG interface integrating advanced features
The RISC-V subsystem comes with a powerful software development and debug tool, an IDE called SmartVisionTM. It is an open environment allowing the design of complete subsystems based on processor cores and peripherals. SmartVisionTM provides an intuitive interface as well as the necessary tools to develop and debug embedded software by simulation or by In Circuit Emulation.
For more information, please contact us at contact@dolphin.fr or on our website: www.dolpin-integration.com
About Dolphin Integration
Dolphin Integration is a pioneer in Energy-Efficient Systems-on-Chip enablement. The company serves a growing range of applications from battery-operated to line-powered. Its portfolio of more than 200 silicon IPs covering Foundation, Feature and power Fabric IPs are proven and available in multiple processes and foundries. This coherent portfolio allows to reduce SoC power consumption in sleep, triggering and active processing modes. The company is committed to its customer success through constant innovation, quality control and dedicated support. Dolphin Integration comes with 30 years experience in integration of silicon IP components leveraging power-integrity driven simulation tools to design and supply cost-effective logic and mixed-signal ASIC/SoC.
Related Semiconductor IP
- RISC-V Debug & Trace IP
- Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
- Compact Embedded RISC-V Processor
- Multi-core capable 64-bit RISC-V CPU with vector extensions
- 64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
Related News
- Dolphin Integration Selects Silvaco Variation Manager eXtreme Memory Analysis for SRAM Design At Advanced Nodes
- The fastest C-Compiler for i251 from Dolphin Integration is now available with our free discovery license!
- Dolphin Integration sets up a large range of sponsored IPs at 55 nm to reduce SoC power consumption by up to 70%
- Shanghai Zhaoxin Semiconductor Co., Ltd. licenses Dolphin Integration ultra dense audio DAC for its next generation of Set Top Box
Latest News
- SoftBank Corp. Subsidiary SAIMEMORY and Intel Collaborate to Commercialize Next-generation Memory Technology
- TES is extending its PMU IP portfolio for X-FAB’s XT018 - 0.18µm BCD-on-SOI technology.
- Attopsemi Scales I-fuse® Technology to 7nm FinFET following 12nm Silicon Success
- Nuclei Announces Strategic Global Expansion to Accelerate RISC-V Adoption in 2026
- Semidynamics Unveils 3nm AI Inference Silicon and Full-Stack Systems