Creonic Introduces 25 Gbit/s LDPC IP Core Solution for ITU G.9804.2 PON Standard
Kaiserslautern Germany -- May 10, 2023 - Creonic GmbH, a leading IP core provider in the field of satellite communications, today introduced its latest LDPC forward error correction solution for passive optical networks (PON). The ITU G.9804.2 standard targets PONs with higher speeds when compared to previous generations. It specifies the common transmission convergence (ComTC) layer.
With the release of these new IP cores, Creonic is providing its customers with a high-performance solution that meets the demands of modern passive optical communication systems.
The Creonic ITU-25G PON LDPC Encoder and Decoder work as part of the Forward Error Correction (FEC) in the ComTC layer, and support the default coding scheme LDPC (17280, 14592), along with the optional scheme LDPC (17152, 14592).
The IP cores achieve throughputs of 25 Gbit/s. By running two cores in parallel a speed of up to 50 Gbit/s can be achieved. AXI4-Stream interfaces for data and configuration allow for a seamless integration int the customer design.
The LDPC decoder and encoder IP cores are available for licensing immediately, supporting ASIC and FPGA technologies such as AMD Xilinx and Intel.
Conntact us for more information.
Related Semiconductor IP
Related News
- Creonic GmbH Introduces Advanced 5G LDPC Encoder IP core for Enhanced Mobile Broadband Connectivity
- Creonic Updates Doppler Channel IP Core with Extended Frequency Band and Sampling Range
- Creonic Releases Updated SDA OCT IP Core Supporting OCT 4.0 and Enhanced Synchronization
- BroadLight Leads GPON Silicon Market With 25 Design Wins for Its Industry-Leading GPON Solution; BroadLight Extends Its Leading ITU-T PON Position in North America Into Countries Around the Globe
Latest News
- Arteris Announces Financial Results for the Fourth Quarter and Full Year 2025 and Estimated First Quarter and Full Year 2026 Guidance
- Arteris Network-on-Chip Technology Achieves Deployment Milestone of 4 Billion Chips and Chiplets
- RISC-V Pivots from Academia to Industrial Heavyweight
- Arteris Technology Deployed More Broadly by NXP to Accelerate Edge AI Leadership
- Avalanche Technology and NHanced Semiconductors Deliver the Industry’s First Truly Space Grade MRAM Boot Solution for RadHard System-in-Package Integration