Compiler development in Mentor environment
Compiler development in Mentor environment
By David Larner, Embedded Systems
October 4, 2001 (10:27 a.m. EST)
URL: http://www.eetimes.com/story/OEG20011004S0026
ACE Associated Compiler Experts (ACE) has joined Mentor Graphics' Certified Technology Provider (CTP) programme. ACE will offer its CoSy compiler development system to members of the Mentor's Embedded Technology Adoption Program (ETAP). CoSy generates compilers for use with embedded processors and digital signal processors (DSPs). The software will be linked with Mentor's XRAY debugger technology in an integrated environment.
Related Semiconductor IP
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
- 10-bit Pipeline ADC - Tower 180 nm
- NoC Verification IP
- Simulation VIP for Ethernet UEC
- Automotive Grade PLLs, Oscillators, SerDes PMAs, LVDS/CML IP
Related News
- QuickLogic Collaborates with Mentor to Provide Seamless Design Environment for eFPGA Technology
- CoWare's Latest Software Release Aligns Strategic Technologies into Cohesive, Platform-driven ESL Design Environment
- Xilinx Chooses SiliconSystems as Preferred Storage Supplier for System ACE Development Environment
- Philips Handshake Solutions releases 5th generation clockless IC design environment with improved layout and testing
Latest News
- Presto Engineering Group Acquires Garfield Microelectronics Ltd, Creating Europe’s Most Comprehensive ASIC Design to Production One-Stop-Shop
- Qualitas Semiconductor Demonstrates Live of PCIe Gen 6.0 PHY and UCIe v2.0 Solutions at ICCAD 2025
- WAVE-N v2: Chips&Media’s Custom NPU Retains 16-bit FP for Superior Efficiency at High TOPS
- Quintauris releases RT-Europa, the first RISC-V Real-Time Platform for Automotive
- PQShield's PQCryptoLib-Core v1.0.2 Achieves CAVP Certification for a broad set of classical and post-quantum algorithms