Cardtools enhances NitroVP verification system

Cardtools enhances NitroVP verification system
By Michael Santarini, EE Times
May 31, 2000 (4:33 p.m. EST)
URL: http://www.eetimes.com/story/OEG20000531S0030

SAN MATEO, Calif. — Cardtools Systems, an embedded software and EDA tools vendor, has upgraded its NitroVP hardware and software co-design and verification system.

Joseph Rothman, president of Cardtools (San Jose, Calif.), said the new NitroVP, version 6.0, offers timing and functional modeling. It also offers high-speed simulation of entire system-on-chip (SoC) designs, a new integrated SoC debugger, language-independent modeling and increased support for multiple processors and multiple instruction set simulators.

NitroVP is unique in SoC hardware/software co-design because it was created by an embedded software company, according to Cardtools. Most other offerings have come from traditional hardware-focused EDA vendors such as Mentor Graphics Corp., Cadence Design Systems Inc. and Synopsys Inc.

Unlike traditional EDA tools, NitroVP incorporates timing in the functional design of an SoC, Rothma n said. "We wanted to make sure that architecture of the system will depend on the timing of the system," he said. "We used to have timing capabilities on the software side but now we also have added timing to the hardware side to make a much more complete environment."

Version 6.0 also allows users to model at low levels as well as high levels of abstraction to create a pseudo-cosimulation where they debug software based on high-level models, Rothman said.

Users can now connect multiple types of models in NitroVP's block-based environment, he said. NitroVP incorporates a backplane that links models written in C, C++ or the company's proprietary databook and throughput models. Third-party HDL simulators can also be connected to the environment.

NitroVP running on Windows and Unix is priced at $75,000.

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