Azul Systems Leverages TSMC 90 nm Process for Next-Generation System
MOUNTAIN VIEW, Calif. and HSINCHU, Taiwan, R.O.C. -- March 30, 2006
-- Azul Systems, Inc., the industry pioneer in network- attached processing solutions for transaction-intensive applications, today announced that Azul Systems will use TSMC's advanced 90 nm process for its next-generation multicore processor.
The Azul® Vega(TM) 2 processor is a single-chip 64-bit processor with 48 cache-coherent processor cores. Vega 2 is architected from the ground up for web-enabled transaction intensive applications, and utilizes TSMC's advanced 90nm process, a 9-layer copper/low-k interconnect and multi-threshold transistors for optimal performance-power efficiency. The product is expected to be the latest example of the industry-leading collaboration between TSMC and Azul over the past several years.
"We are delighted to be working with TSMC on what are some of the most exciting semiconductor projects in the industry today," said Stephen DeWitt, president and chief executive officer of Azul Systems. "The Vega 2 processor consists of 812 million transistors and will enable Azul Compute Appliances to scale up to 768-way symmetric multiprocessing (SMP) systems and enable the deployment of a true service oriented infrastructure."
Systems based on the Vega 2 chip are scheduled for general availability in 2007.
About Azul Systems
Azul Systems, Inc. has pioneered the industry's first network attached processing solution, designed to unbound compute resources for transaction-intensive applications and services. Without application level modifications, binary compatibility requirements or operating system dependencies, this fundamentally new approach eliminates the need to capacity plan at the application level and dramatically lowers the cost and complexity associated with the traditional delivery of computing resources. More information on Azul Systems can be found at www.azulsystems.com.
Related Semiconductor IP
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
- 10-bit Pipeline ADC - Tower 180 nm
- Simulation VIP for Ethernet UEC
- Automotive Grade PLLs, Oscillators, SerDes PMAs, LVDS/CML IP
- CAN-FD Controller
Related News
- Dolphin Integration first to achieve 0.84 pA per bit in SpRAM at the 90 nm uLL embedded flash process
- Dolphin Integration announces the availability of the new generation of SpRAM generator at 90 nm and 55 nm eFlash
- Mikron Licenses Cadence Physical Verification System and QRC Extraction Solutions for 90 nm IC Design Flow
- Dolphin Integration announce the availability of the TSMC sponsored sROMet and DpRAM generators at 90 nm LP eFlash
Latest News
- Qualitas Semiconductor Demonstrates Live of PCIe Gen 6.0 PHY and UCIe v2.0 Solutions at ICCAD 2025
- WAVE-N v2: Chips&Media’s Custom NPU Retains 16-bit FP for Superior Efficiency at High TOPS
- Quintauris releases RT-Europa, the first RISC-V Real-Time Platform for Automotive
- PQShield's PQCryptoLib-Core v1.0.2 Achieves CAVP Certification for a broad set of classical and post-quantum algorithms
- M31 Debuts at ICCAD 2025, Empowering the Next Generation of AI Chips with High-Performance, Low-Power IP