ARM's Greg Yeric on memory, logic and making it
September 19, 2018 // By Peter Clarke, eeNews
eeNews Europe took the chance to sit down with ARM Fellow Greg Yeric at this year's ARM Research Summit in Cambridge. We started by asking Yeric what was ARM's position on the plethora of emerging non-volatile memories.
ARM is paying attention to this because of the potential to be highly disruptive in the logic space and therefore at the platform (hardware-software) level, Yeric said. "There's resistive RAMs of various types and magnetic RAM and TSMC has recently made an embedded ReRAM so there's a lot going on. ARM has its own DARPA-funded research into correlated electron RAM (CeRAM)."
Yeric explained that at 28nm flash memory cannot really scale any more – hence the move to 3D stacking for stand-alone flash memories. "Flash is power hungry and very slow."
Related Semiconductor IP
- RISC-V CPU IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
Related News
- Interview: Arm's SystemReady 2.0 to Secure IoT Devices
- Integrated Silicon Systems expands board : Pete Magowan, Greg Reyes join ASVC leader
- Interview: John Bourgoin, chairman and CEO of MIPS Technologies
- Interview: Chet Silvestri, CEO of ParthusCeva (by Matthew Clark, ElectricNews.Net)
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers