Analog Bits to Demonstrate Automotive Grade IP's Including a Novel High Accuracy Sensor at TSMC 2023 North America Open Innovation Platform Ecosystem Forum
Sunnyvale, CA, September 27, 2023 – Analog Bits (www.analogbits.com), the industry’s leading provider of low-power mixed-signal IP (Intellectual Property) solutions will be demonstrating Automotive Grade silicon data in TSMC N5A process as well as their new novel high accuracy temperature Sensor at TSMC 2023 North America Open Innovation Platform® (OIP) Ecosystem Forum. This development is part of Analog Bits’ broadening portfolio of Mixed Signal IP in advanced TSMC 3nm, 4nm, and 5nm processes, and design kits are available now.
“As we work with leading edge automotive customers on advanced FinFet processes, thermal issues continue to be a concern and need for multiple instances of sensors continues. Furthermore, many applications cannot have additional test costs associated with trimming for higher accuracy” said Mahesh Tirupattur, Executive Vice President at Analog Bits. “We have been working on designs for improving un-trimmed accuracy in FinFets and reducing the area of the Sensors and we are pleased to demonstrate working silicon of these higher accuracy Sensors on N5A process. Come and watch the demo at our booth.”
When:
September 27th, 2023
Register
Resources
To learn more about Analog Bits' foundational analog IP, visit www.analogbits.com or email us at info@analogbits.com.
About Analog Bits
Founded in 1995, Analog Bits, Inc. is the leading supplier of mixed-signal IP with a reputation for easy and reliable integration into advanced SOCs. Our products include precision clocking macros, Sensors, programmable interconnect solutions such as multi-protocol SERDES and programmable I/O’s. With billions of IP cores fabricated in customer silicon, from 0.35 micron to 3nm processes, Analog Bits has an outstanding heritage of "first-time-working” with foundries and IDMs.
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- Analog Bits to Demonstrate IP Portfolio on TSMC 3nm and 2nm Processes at TSMC 2025 Technology Symposium
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Analog Bits to Demonstrate Power Management and Embedded Clocking and High Accuracy Sensor IP at the TSMC 2024 Open Innovation Platform Ecosystem Forum
- Analog Bits Expands SERDES Product Line to Include SONET Grade IP
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack