Altera’s New MAX II CPLD Family Delivers Dramatic Reduction in Cost and Power Consumption


50 Percent Lower Cost Substantially Expands CPLD Market Opportunity

San Jose, Calif., March 8, 2004

—Altera Corporation (NASDAQ: ALTR), the number one supplier of complex programmable logic devices (CPLDs), today launched the new MAX® II device family, the industry's lowest-cost CPLDs.  The MAX II family is half the cost and consumes only one-tenth the power of previous MAX generations, while maintaining the same instant-on, single-chip, non-volatile, and ease-of-use characteristics of the original MAX series.  Additionally, the new family delivers a 4X increase in density and over twice the performance of prior-generation MAX CPLDs.  With MAX II devices, engineers building high-volume consumer, communications, industrial, and computing designs can replace small ASICs and ASSPs, which are more costly and less flexible.  As a result, Altera estimates that its target market will expand dramatically from $500 million to $2 billion. (For more details about MAX II features, see the related press release, or log on to www.altera.com/max2.)

"We've used Altera® MAX CPLDs for years because of their ease-of-use, in-circuit reprogrammability, and low cost," said George Rideout, hardware engineering manager for WAN Products Performance Technology, Inc.  "In our next-generation WAN products, the MAX II family makes it possible to implement our designs with the added advantages of significant power savings, higher logic density, board space reduction, and substantially lower cost."

Low Cost and Low Power by Design

At the heart of the MAX II family is a new architecture that delivers dramatic cost and power reductions.  To achieve this, Altera departed from its traditional macrocell architecture and adapted the look-up table (LUT) structure to meet the needs of CPLD designers.  Manufactured on TSMC's 0.18-micron embedded flash process, the LUT-based architecture allows for die sizes that are one-quarter the size of competing devices on the same fabrication process.  The dramatic reduction in die size enables a 50 percent reduction in cost over the previous MAX generation.  The new architecture utilizes a staggered ring of I/O pads optimized for the new family, further reducing cost. Don Schild, systems engineer, Lowry Organ Company, states, "We use MAX CPLDs for I/O expansion to drive the visual displays in our Elite Series organs because they offer the most cost-effective solution for general-purpose I/O.  We look forward to using Altera's MAX II device family, which will deliver even greater cost advantages for our products."

MAX II devices also have the industry's lowest dynamic power consumption.  At only one-tenth the power of previous MAX generations, MAX II devices now offer the lowest overall power solution in the marketplace.  This makes them ideal for a wide range of battery-powered equipment.

Going Big on Performance and Density

In addition to cost and power consumption benefits, the new architecture also delivers strong performance and density gains.  MAX II devices are, on average, over 2X faster than prior generations – a result of improvements in routing architecture, software algorithms, and process technology.  The density in MAX II devices is 4X what Altera offered in previous families, and exceeds any offering from competitors today by a factor of two.

"As the number one supplier of CPLDs with more than 40 percent market share, Altera will fully leverage MAX II devices to expand our leadership," said Erik Cleage, Altera's senior vice president of marketing.  "Our continuous innovation, as demonstrated by this new family, will keep us ahead of the pack.  Our customers expect nothing less."

Other Features and Benefits

  • User Flash Memory—Altera is the first programmable logic supplier to offer embedded flash memory for user applications within a programmable logic device. This allows the MAX II device family to replace commonly used serial or parallel EEPROMs that typically range from 50 cents to 2 dollars in volume, further reducing the cost of end systems.  The memory capacity per device is 8 Kbits across the entire family.

  • Real-time ISP—Users can reconfigure MAX II devices in real time without interrupting functionality.  This allows customers to add functionality and flexibility to field-deployed customer systems.

Quartus II Version 4.0 Software Support

Customers can immediately start designing for MAX II devices with Altera's Quartus® II version 4.0 design software, the highest performance and easiest-to-use design tool available for CPLD design.  Now featuring a built-in MAX+PLUS® II look-and-feel option, MAX+PLUS II users can benefit from the Quartus II software's advanced features and performance without having to learn a new graphical user interface.  The Quartus II software also integrates seamlessly with all of the leading third-party synthesis and simulation tools.  Customers who do not have an active subscription to Altera's tool suite can download Altera's no-cost Quartus II Web Edition design software at www.altera.com/q2webedition.  The Quartus II Web Edition design software supports all members of the MAX II device family.    

Availability, Packaging, and Pricing

The MAX II device family includes four members ranging in density from 240 to 2,200 logic elements (LEs).  Low-cost packages are available for the MAX II devices, including 1.0‑mm FineLine BGA® (FBGA) and 0.5-mm thin quad flat pack (TQFP) packages.  The first MAX II device, the EPM1270 device, will be available mid-2004.  All family members will be available in full production by the first quarter of 2005. 

Device LEs Price at 500K Units

EPM240

240

$1.50

EPM570

570

$2.30

EPM1270

1,270

$4.25

EPM2210

2,210

$7.00

About Altera

Altera Corporation (NASDAQ: ALTR) is the world's pioneer in system-on-a-programmable-chip (SOPC) solutions.  Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide.  More information is available at www.altera.com.

###

×
Semiconductor IP