Altera and New AMPPSM Partner ARC Cores Announce Configurable RISC Processor For APEX(tm) 20K Devices <!--<FONT SIZE=-1>(by Peter Clarke - EE-TIMES)</FONT>-->
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Altera and New AMPPSM Partner ARC Cores Announce Configurable RISC Processor For APEX(tm) 20K Devices
- User Configurable, 32-bit RISC Core for System-on-a-Programmable-Chip(tm) Designs
- Fast Design Solution for Embedded Processor-Based PLD Designs
- ARC Cores joins Altera's Megafunction Partner Program (AMPPSM)
San Jose, Calif., September 27, 1999 -- Altera Corporation (Nasdaq: ALTR) and ARC Cores of London, U.K., today announced availability of the ARC configurable processor optimized for the APEX(tm) 20K family of programmable logic devices (PLDs). The ARC core allows designers to quickly and easily customize the 32-bit RISC microprocessor to their specific applications. When executed in the APEX 20K programmable logic device, the user-configured ARC processor can be integrated into system-on-chip designs to optimize performance and cost.
"The extensibility of the ARC configurable processor and the flexibility of a PLD architecture is a combination that opens the floodgates on system-level integration," said Craig Lytle, senior director of Altera's intellectual property business unit. "ARC's configurable processor, implemented on the APEX 20K device, will dramatically accelerate hardware/software development and debug flows, providing another key feature in what we refer to as System-on-a-Programmable-Chip(tm) design." "Like ARC Cores, Altera was among the first to recognize the changing dynamics of system design. The AMPPSM program streamlines our design process for system developers by allowing them to customize their processor and actually try it in the lab in just hours," said Jim Turley, ARC Cores vice president marketing. "The ability to customize and iterate on an ARC-based design several times in a single day allows programmers and designers to be absolutely certain that they've crafted the ideal software engine for their system. Altera's silicon and ARC's flexible processor architecture make this happen."
About ARC's Core
The ARC core is the first fully synthesizable and user-configurable 32-bit microprocessor core. The central core itself remains stable and consistent, but performance, die-size, power consumption, voltage, and other special features are all scaled as needed by the user. In addition to the ARC core's availability for APEX devices, the ARC 32-bit RISC microprocessor has also been optimized for the FLEX(r) 10K family and is supported by the ARCangel prototyping system. Many of the features built into the ARCangel were designed specifically to reduce development time for new products. For example, developers can use the ARCangel to evaluate processor configurations while simultaneously starting software development and debugging.
About APEX
The ARC configurable processor is available and has been optimized for the APEX EP20K400. The EP20K400 device is fabricated on a 0.25-micron (drawn), six-layer metal SRAM process and features 16,640 logic elements, 104 embedded system blocks, and up to 1664 macrocells and 212,992 bits of on-chip RAM for a combined total of approximately 400,000 gates, or a maximum of 1,052,000 system gates.
All devices in the APEX family feature Altera's unique MultiCore(tm) architecture, which combines look-up table logic, product-term logic and embedded memory into MegaLAB(tm) blocks. Each MegaLAB block is connected to all other MegaLAB blocks in the device via Altera's continuous FastTrack(r) Interconnect routing structure. Each embedded system block (ESB) within a MegaLAB block contains 2,048 programmable bits; these bits can be configured to support product-terms, dual-port RAM or ROM.
Availability, Packaging, and Pricing
The ARC microprocessor core and related configuration tools may be licensed directly from ARC Cores. The package includes hardware source code for the processor, configuration manager with GUI, C/C++ tool chain, assembler, linker/locator, profiler, debugger, and related software tools. For more information, contact ARC Cores at <http://www.arccores.com/> or phone +1.408.360.2120 (US) or +44.20.8951.6100 (UK).
About ARC
ARC provides the world's first 32-bit microprocessor that is user-configurable, process independent, and can be quickly and easily personalized for a customer's specific application. The robust and flexible ARC core, along with the ARC development tools, automatically generates a processor that integrates seamlessly into the total solution. A venture capital backed company, based in London, UK and San Jose, Calif., ARC licenses the ARC processor core to system houses, semiconductor manufacturers, and ASIC vendors. The ARC is ideal for today's cost-sensitive, high-performance communications and networking applications. For more information, visit: http://www.arccores.com or phone +44.208.951.6100 (UK) or +1.408.360.2120 (US).
About Altera
Altera Corporation, The Programmable Solutions Company(tm), was founded in 1983 and is a leading supplier of programmable logic devices and associated logic development software tools. Programmable logic devices are semiconductor chips that can be programmed on-site, using software tools that run on personal computers or engineering workstations. User benefits include ease of use, lower risk, and fast time-to-market. Altera's CMOS-based programmable logic devices address high-speed, high-density and low-power applications in the telecommunications, data communications, computer peripheral, and industrial markets. Altera common stock is traded on the Nasdaq Stock Market under the symbol ALTR. More information on Altera can be obtained on the Internet at http://www.altera.com.
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Altera, The Programmable Solutions Company, APEX, AMPP, System-on-a-Programmable-Chip, FLEX, MultiCore, MegaLAB, FastTrack, and specific device designations are trademarks and/or service marks of Altera Corporation in the U.S. and other countries. All other trademarks are the property of their respective holders.
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