Agilent Technologies and Denali Software to Develop Comprehensive Validation Process for PCI Express Technology* to Speed Chip Design
San Jose, Calif., INTEL DEVELOPERS FORUM, Booth #'s 219 and 222, September 16, 2003--Agilent Technologies Inc. (NYSE: A) and Denali Software Inc. today announced a collaboration to develop a comprehensive design validation process for chip designs incorporating the PCI Express* interconnect standard. The resulting solution is expected to speed PCI Express system development by enabling designers to coordinate pre-silicon verification tests with post-silicon test and analysis efforts.
The first milestone in the effort, demonstrated by the companies at the Intel Developer Forum, provides a common PCI Express packet viewing capability for the pre-silicon simulation and post-silicon hardware debug. This joint offering gives PCI Express designers the ability to view simulated PCI Express traffic data from Denali’s PureSpec verification tool in the Agilent E2960A protocol analyzer’s graphical user interface. For the first time, designers can seamlessly track potential errors captured during hardware debugging back into the pre-silicon simulation environment to help identify the source of the problem.
The Agilent E2960A test series, the most complete and innovative array of test equipment in PCI Express, supports the industry’s move from parallel to serial I/O buses for duplex speeds of x8, x4 and x1 bandwidth. The Agilent E2960A test series for PCI Express is the first protocol implementation in the Agilent serial protocol tester XC, offering a universal hardware approach with analyzer and exerciser applications, protecting the customer’s investment. Agilent also offers the industry’s first PCI Express x1 protocol test card E2969A for compliance testing.
The Denali’s PureSpec verification tool is the industry-leading solution for verifying compliance and interoperability for PCI Express designs. Chip designers use PureSpec to model and simulate the interaction between the chip design and other potential PCI Express devices. Working with the PCI-SIG and over 50 vendors engaged in PCI Express designs, Denali has developed thousands of assertions or rules that are automatically monitored by PureSpec during simulation. Erroneous PCI Express interface activity is immediately flagged, enabling designers to identify and fix potential bugs before the design is implemented in silicon.
"Agilent is committed to continuous innovations on the Agilent serial protocol tester XC in order to foster the PCI Express technology and the move from parallel to serial buses for all computer interconnects," said Siegfried Gross, vice president and general manager for Agilent’s Digital Verification Solutions Division. "Our collaboration with Denali is one of the steps linking pre-silicon design verification and post-silicon analysis that will help our customers focus on what’s most important to them -- creating great new next-generation computing and communication platforms."
"We are seeing a tremendous amount of design activity as companies race to implement PCI Express technology in their next-generation chips," said David Lin, Denali vice president of strategic products. "Like Agilent, Denali made a very early commitment to enable the transition to PCI Express by providing customers with best-in-class design and verification solutions. It is very exciting to work with Agilent. With this joint solution, we are now able to bridge the gap between pre- and post-silicon design efforts for our customers, which ultimately streamlines the chip design process and speeds time to market for PCI Express products."
Further details on the Agilent PCI Express tool portfolio are available at www.agilent.com/find/pci_Express
More information about Denali’s PCI Express solutions is available online at www.denali.com/pciexpress.
About Denali Software, Inc.
Denali Software Inc. is the world’s leading provider of EDA tools and Semiconductor Intellectual Property (SIP) solutions for chip interface design, integration, and verification. More than 400 companies worldwide use Denali’s tools, technology, and services to design and verify complex chip interfaces for communication, consumer, and computer products. For more information, please visit Denali at www.denali.com or contact Denali directly at: 650-461-7200, or email: info@denali.com
About Agilent Technologies
Agilent Technologies Inc. (NYSE: A) is a global technology leader in communications, electronics, life sciences and chemical analysis. The company’s 30,000 employees serve customers in more than 110 countries. Agilent had net revenue of $6 billion in fiscal year 2002. Information about Agilent is available on the Web at www.agilent.com
Forward Looking Statements
This news release contains forward-looking statements (including, without limitation, statements relating to the expectation that the product resulting from the collaboration between Agilent and Denali Software will speed PCI Express system development) that involve risks and uncertainties that could cause results of Agilent Technologies to differ materially from management’s current expectations. These and other risks are detailed in the company’s filings with the Securities and Exchange Commission, including its Annual Report on Form 10-K for the year ended Oct. 31, 2002, its Quarterly Report on Form 10-Q for the quarter ended April 30, 2003 and its Current Report on Form 8-K filed July 17, 2003. The company assumes no obligation to update the information in this press release.
Denali, the Denali logo, Databahn, eMemory, MMAV, and PureSpec are trademarks of Denali Software, Inc. PCI Express is a trademark of PCI-SIG. All other trademarks are the property of their respective owners.
Related Semiconductor IP
- RISC-V CPU IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
Related News
- Truechip announces first customer shipment of PCI Express Gen3 Comprehensive Verification IP (CVIP)
- PLDA Announces "Inspector" - An Evolution of the PCI Express 4.0 PDK That Enables PCIe 4.0 Technology Design Validation and Performance Optimization Today
- Rambus Announces Comprehensive PCI Express 5.0 Interface Solution
- Synopsys Demonstrates Industry's First Interoperability of PCI Express 6.0 IP with Intel's PCIe 6.0 Test Chip
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers