SiMa.ai Welcomes New Investor MSD Partners Bringing Total Investment to $187 Million - SiMa.ai extends oversubscribed series B1 funding to $67 Million
2022-10-27 16:47:00
Business
Chiplet News Archive - Page 202 of 1936
Zynq® UltraScale+™ MPSoC FPGA: REFLEX CES adds a new FPGA version to its Zeus Zynq® UltraScale+™ MPSoC System-on-module
2022-10-27 16:47:00
Embedded Systems
Weebit Nano successfully qualifies its ReRAM module
2022-10-27 16:47:00
IP
Cadence's New Flow Automates Custom/Analog Design Migration on TSMC Advanced Technologies
2022-10-27 10:00:00
EDA
GUC GLink™ Chip Leverages proteanTecs' Die-to-Die Interconnect Monitoring
2022-10-27 08:56:00
Deals
Flex Logix EFLX4K eFPGA IP Core on TSMC 7nm Technology Now Available
2022-10-26 14:08:00
IP
GUC Unveils GLink 2.3LL, The World's Most Powerful D2D Interconnect IP Using 2.5D Technology
2022-10-26 12:33:00
IP
Worldwide Silicon Wafer Shipments Set a New Record in Q3 2022, SEMI Reports
2022-10-26 08:58:00
Commentary / Analysis
More than 50 members join SOAFEE to enable the software-defined vehicle of the future
2022-10-26 08:38:00
Other
Cadence Digital and Custom/Analog Design Flows Achieve Certification for TSMC's Latest N4P and N3E Processes
2022-10-26 07:55:00
EDA
Avery Continues to Drive CXL Adoption with New Virtual Platform Features in Support of Version 3.0
2022-10-25 14:49:00
Verification IP
Alphawave IP Achieves Its First Testchip Tapeout for TSMC N3E Process
2022-10-25 14:12:00
IP
Flex Logix Opens Up Licensing to its InferX AI Technology
2022-10-25 14:04:00
IP
Faraday Reports Third Quarter 2022 Results
2022-10-25 08:59:00
Financial
Cadence Reports Third Quarter 2022 Financial Results
2022-10-25 08:55:00
Financial
Analog Bits to Demonstrate Pinless PLL and Sensor IP in TSMC N4 and N5 Processes at TSMC 2022 North America Open Innovation Platform® Ecosystem Forum
2022-10-25 08:54:00
Other
Rambus Delivers PCIe 6.0 Interface Subsystem for High-Performance Data Center and AI SoCs
2022-10-25 08:07:00
IP
Cadence Joins Intel Foundry Services USMAG Alliance to Accelerate Chip Design Development
2022-10-25 08:04:00
EDA
SEGGER introduces streaming trace probe for SiFive RISC-V cores
2022-10-25 08:04:00
Embedded Systems
SiFive and Synopsys Collaborate to Accelerate SoC Design
2022-10-25 06:22:00
EDA