SiliconBlue 65-nm FPGAs run on microamps
Peter Clarke, EE Times
(03/07/2008 11:42 AM EST)
(03/07/2008 11:42 AM EST)
LONDON — SiliconBlue Technologies Corp. (Sunnyvale Calif.) is offering a family of low-power FPGAs implemented on a 65-nm CMOS manufacturing process. The FPGAs, which carry their own non-volatile memory on-chip for holding configuration data, come in small ball grid array packages and are intended for use in mobile phones and other handheld devices.
The company was founded by Kapil Shankar, CEO, a 20-year veteran of the programmable logic industry, and Antti Kokkinen, a partner and cofounder of venture capital firm BlueRun Ventures (Menlo Park, Calif.).
To read the full article, click here
Related Semiconductor IP
- Rad-Hard GPIO, ODIO & LVDS in SkyWater 90nm
- 1.22V/1uA Reference voltage and current source
- 1.2V SLVS Transceiver in UMC 110nm
- Neuromorphic Processor IP
- Lossless & Lossy Frame Compression IP
Related News
- Dolphin Integration measures 15% area reduction on 65 nm logic circuit with its 6-Track standard cell library
- Texas Instruments and Continental collaborate to deliver first 65 nm safety ARM Cortex microcontroller used in advanced automotive safety applications
- Dolphin Integration offers first standard cell library to enable a leakage reduction of 1/350 at 65 and 55 nm
- AMI Semiconductor Expands Digital IP Library with the Addition of 65 Inventra Cores
Latest News
- Andes Technology Announces D23-SE: A Functional Safety RISC-V Core with DCLS and Split-Lock for ASIL-B/D Automotive Applications
- OPENEDGES Technology Expands ISO 26262 ASIL-B Certificationto Network-on-Chip IP
- GUC Joins NVIDIA NVLink Fusion Ecosystem to Drive Seamless XPU Integration
- Silicon Creations Named GlobalFoundries Analog Mixed Signal IP Partner of the Year
- Tenstorrent releases RiescueD, a powerful framework for writing direct tests in RISC-V assembly