ChipX Introduces 10-bit and 12-bit ADC IP Cores For Data Monitoring, Data Acquisition and Analog Front-Ends in Application
Specific Integrated Circuits (ASICs) Industrial-grade pipeline ADCs are ideal for medical, wireles, industrial, military and aerosspace mixed-signal ASICs
Santa Clara – Feb 4, 2009 – ChipX, Inc, a mixed-signal ASIC company providing the industry's broadest offering of low-risk solutions, today announced the addition of a family of 10-bit and 12-bit Analog to Digital Converters (ADCs) to its extensive line-up of analog and mixed-signal Intellectual Property (IP). The new IP cores include three 10-bit ADCs rated at 40Msps, 100Msps and 160Msps. The family of pipeline ADCs also include three 12-bit ADCs rated at 20Msps, 40Msps and 80Msps.
Designed for medium to high-speed applications, these ADCs are ideal in numerous designs. They can be used for data acquisition in military, aerospace, test and measurement systems. They can be used for data monitoring in industrial and medical applications. They can also be combined with ChipX high-speed DACs to form an analog front-end (AFE) for wireless applications, such as WIFI, WIMAX as well as GPS systems. The ADCs can also be used in video and broadcast applications including KVMs (Keyboard-Video-Mouse). Fully-characterized in a 0.13μ high-speed process, these ADCs can be combined with other proven ChipX IP and customer applications to create highly integrated and cost-effective System-on-Chip (SoC) designs.
“Our target customers use ADCs in many of their systems”, said Elie Massabki, Vice President of Marketing and Sales
for ChipX. “Integrating our silicon-proven ADCs and DACs in ASICs will enable our customers to reduce their overall system power consumption, board real-estate and total bill of material (BOM) cost.”
Technical Details
The CXIP6K10B40A/100A/160A are complete 10-bit, 40Msps/100Msps/160Msps pipeline analog-to-digital converters (ADCs). The CXIP6K12B20A/40A/80A are complete 12-bit, 20Msps/ 40Msps/80Msps pipeline analog-to-digital converters (ADCs). These ADCs have all the necessary building blocks including references and clock management. They include an analog interface with internal 1.25 V reference, and programmable gain and offset control. Easy interfacing with standard signals is provided by the 2Vpp differential input. Other signal levels can be accommodated using signal conditioning circuits. To operate, only two power supplies are required, including 3.3V (output) and 1.2V for the analog section of the design. On-chip supplies can be used for this purpose. For applications requiring timing management, on-chip PLLs can be used to generate pixel clocks. ChipX offers PLLs from 10MHz to 1GHz, including Spread Spectrum tracking PLLs for noise sensitive applications. Interfacing to on-chip circuits is straightforward using a simple register access method.
Using the 130nm UMC HS process, this family of ADCs is highly optimized and requires little die area. All IP cores operate over the -40°C to 125°C industrial temperature range.
Each of the ADC family members includes reference circuits, simple processor interface, and output buffers; and a demonstration platform is available on request. They can be integrated with the full range of ChipX building blocks, including USB 2.0, PCI Express, DDR/DDR2, ARM(926) or BA12/22 processors, to create a System on Chip (SoC) mixed-signal Standard Cell or Hybrid ASIC today.
Complete ADC specifications can be found on the ChipX website at www.ChipX.com.
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